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TSB14C01AI Datasheet(PDF) 9 Page - Texas Instruments |
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TSB14C01AI Datasheet(HTML) 9 Page - Texas Instruments |
9 / 31 page TSB14C01A, TSB14C01AI, TSB14C01AM 5-V IEEE 1394-1995 BACKPLANE TRANSCEIVER/ARBITER SGLS107A – FEBRUARY 1999 – REVISED NOVEMBER 1999 9 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 APPLICATION INFORMATION internal register configuration The accessible internal registers of this device are listed in Table 2. Bit field descriptions for the registers are given in Table 3. Table 2. Format for Registers ADDRESS 0 1 2 3 4 5 6 7 0000 Physical ID[0] Physical ID[1] Physical ID[2] Physical ID[3] Physical ID[4] Physical ID[5] Reserved Reserved 0001 INHB IBR RESERVED 0011 RESERVED 0100 Priority level[0] Priority level[1] Priority level[2] Priority level[3] RESERVED Table 3. Register Bit Field Key FIELD SIZE (Bits) TYPE DESCRIPTION Physical ID 6 Read/Write Physical identification. Physical ID is the address of the local node and is set to zero on power up. INHB 1 Read/Write Inhibit Drivers. INHB is used to turn off the drivers to TDATA and TSTRB. IBR 1 Read/Write Initiate Bus Reset. IBR is turned on by the link and turned off by the phy when reset is complete. Priority 4 Read/Write Priority setting. The four bits contain the priority of the local node. A higher value in this field indicates a higher priority. transceiver selection The system designer must select transceivers appropriate to the system requirements to be used with the TSB14C01A and the link layer selected. The following lists requirements for the transceivers needed. D The transceivers used must be appropriate to the backplane technology used. The various backplane technologies require different electrical characteristics in their backplanes. For example BTL uses an operating voltage on the backplane of 2.1 V and a characteristic impedance of 33 Ω while GTL uses an operating voltage of 1.2 V and a characteristic impedance of 50 Ω (see GTL/BTL a Low Swing Solution for High-Speed Digital Logic, TI literature number SCEA003). When a backplane is designed to use BTL technology, then it would be appropriate to also use that technology for the two lines dedicated to the 1394 serial bus. The drivers selected also must be able to supply the current required for the expected backplane loading. For example, BTL operates correctly for a FutureBus configuration backplane at 50 Mbits/s or for a limited number of nodes in a custom configuration at 100 Mbits/s. See the GTL/BTL a Low Swing Solution for High-Speed Digital Logic, TI literature number SCEA003, Understanding Advanced Bus-Interface Products, TI literature number SCAA029, or the documentation for the transceiver being considered. D The transceivers used must assert logic states on the backplane in an appropriate manner for the 1394 backplane arbitration. Arbitration under 1394 backplane rules requires the drivers to assert the bus to indicate a logical 1 state, that is a logic 1 being driven by the TSB14C01A. Conversely, the drivers should release the bus to indicate a logic 0 state, a logic 0 being driven by the TSB14C01A. In other words, all drivers must operate in a wired-OR mode during arbitration. D The transceivers used must be able to monitor the bus and drive the bus at the same time. |
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