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CS495314-DVZR Datasheet(PDF) 5 Page - Cirrus Logic

No. de pieza CS495314-DVZR
Descripción Electrónicos  32-bit Audio Decoder DSP Family
Download  36 Pages
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Fabricante Electrónico  CIRRUS [Cirrus Logic]
Página de inicio  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS495314-DVZR Datasheet(HTML) 5 Page - Cirrus Logic

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CS4953xx Data Sheet
32-bit Audio Decoder DSP Family
DS705PP5
Copyright 2009 Cirrus Logic
5
2.1 Migrating from CS4953x3 to CS4953x4
• The recommended way to boot the DSP for normal operation is “master boot”. Refer to Chapter 1 of the
CS4953x4/CS4970x4 System Designer’s Guide. CS4953x4 will support slave boot mode as well (used
for programming the serial flash with the DSP code, through the SCP2 port).
• CS4953x4 DSPs are only available in 128 pin package.
• The serial flash chip select pin used is pin 14 (GPIO0). Cirrus Logic recommends that at least an 8-Mbit
serial Flash device be used. Refer to CS4953x4/CS4970x4 System Designer’s Guide for a list of Flash
types that are currently supported
• CS4953x4 DSP family supports DSP Condenser and DSP Manager API for run-time control/host
communication. Please refer to CS4953x4/CS4970x4 System Designer’s Guide for details.
2.2 Licensing
Licenses are required for all of the 3rd party audio decoding/processing algorithms listed below, including the
application notes. Please contact your local Cirrus Sales representative for more information.
3. Code Overlays
The suite of software available for the CS4953xx family consists of an operating system (OS) and a library of
overlays. The overlays have been divided into three main groups called Decoders, Mid-processors, and Post-
processors. All software components are defined below:
1. OS/Kernel - Encompasses all non-audio processing tasks, including loading data from external memory,
processing host messages, calling audio-processing subroutines, error concealment, etc.
2. Decoders - Any Module that initially writes data into the audio I/O buffers, e.g. AC-3®, DTS, PCM, etc. All the
decoding/processing algorithms listed below require delivery of PCM or IEC61937-packed, compressed data
via I2S- or LJ-formatted digital audio to the CS4953xx.
3. Matrix-processors - Any module that processes audio I/O buffer PCM data in-place before the Post-
processors. Generally speaking, these modules alter the number of valid channels in the audio I/O buffer
through processes like Virtualization (n 2 channels) or Matrix Decoding (2 n channels). Examples are Dolby
ProLogic IIx and DTS Neo:6.
4. Post-processors - Any module that processes audio I/O buffer PCM data in-place after the Mid-Processors.
Examples are Bass Management, Audio Manager, Tone Control, EQ, Delay, Customer-specific Effects, Dolby
Headphone/Virtual Speaker, etc.
The overlay structure reduces the time required to reconfigure the DSP when a processing change is
requested. Each overlay can be reloaded independently without disturbing the other overlays. For example,
when a new decoder is selected, the OS, mid-, and post-processors do not need to be reloaded — only the
new decoder (the same is true for the other overlays).
Table 2 below lists the firmware available based on device selection. Please refer AN288 CS4953xx Firmware
User’s Manual for the latest listing of application codes and Cirrus Frameworkmodules available.


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