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CS61535A Datasheet(PDF) 3 Page - Cirrus Logic |
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CS61535A Datasheet(HTML) 3 Page - Cirrus Logic |
3 / 36 page DIGITAL CHARACTERISTICS (TA = -40°C to 85°C; TV+, RV+ = 5.0V ±5%; GND = 0V) Parameter Symbol Min Typ Max Units High-Level Input Voltage Pins 1-4, 17, 18, 23-28 (Notes 7, 8, 9) VIH 2.0 - - V Low-Level Input Voltage Pins 1-4, 17, 18, 23-28 (Notes 7, 8, 9) VIL -- 0.8 V High-Level Output Voltage (IOUT = -40 μA) Pins 6-8, 11, 12, 25 (Notes 7, 8, 10) VOH 4.0 - - V Low-Level Output Voltage (IOUT = 1.6 mA) Pins 6-8, 11, 12, 23, 25 (Notes 7, 8, 10) VOL -- 0.4 V Input Leakage Current (Except Pin 5) - - ±10 μA Low-Level Input Voltage, Pin 5 VIL -- 0.2 V High-Level Input Voltage, Pin 5 VIH (RV+) - 0.2 - - V Mid-Level Input Voltage, Pin 5 (Note 11) VIM 2.3 - 2.7 V Notes: 7. This specification guarantees TTL compatibility (VOH = 2.4V @ IOUT = -40 μA). 8. In Host Mode, pin 23 is an open drain output and pin 25 is a tristate output. 9. Pins 17 and 18 of the CS61535A are digital inputs in the Extended Hardware Mode. 10. Output drivers will drive CMOS logic levels into a CMOS load. 11. As an alternative to supplying a 2.3-to-2.7V input, this pin may be left floating. ANALOG SPECIFICATIONS (TA = -40°C to 85°C; TV+, RV+ = 5.0V ±5%; GND = 0V) Parameter Min Typ Max Units Jitter Attenuator Jitter Attenuation Curve Corner Frequency (Note 12) - 6 - Hz T1 Jitter Attenuation in Remote Loopback (Note 13) Jitter Freq. [Hz] Amplitude [UIpp] 10 10 100 10 500 10 1k 5 10k, 40k 0.3 3.0 20 35 40 40 6.0 30 35 50 50 - - - - - dB dB dB dB dB E1 Jitter Attenuation in Remote Loopback (Note 14) Jitter Freq. [Hz] Amplitude [UIpp] 10 1.5 100 1.5 400 1.5 1k 1.5 10k, 100k 0.2 3.0 20 30 35 35 6.0 32 43 50 50 - - - - - dB dB dB dB dB Attenuator Input Jitter Tolerance (Note 15) 12 23 - UI Notes: 12. Not production tested. Parameters guaranteed by design and characterization. 13. Attenuation measured at the demodulator output of an HP3785B with input jitter equal to 3/4 of measured jitter tolerance using a measurement bandwidth of 1 Hz (10<f<100Hz), 4Hz (100<f<1000 Hz) and 10 Hz (f> 1kHz) centered around the jitter frequency. With a 2 15-1 PRBS data pattern. Crystal must meet specifcations in Appendix A. 14. Jitter measured at the demodulator output of an HP3785A using a measurement bandwidth not to exceed 20 Hz centered around the jitter frequency. With a 2 15-1 PRBS data pattern. Crystal must meet specifications in Appendix A. 15. Output jitter increases significantly when attenuator input jitter tolerance is exceeded. CS61535A DS40F3 3 -XO¶ &21),'(17,$/ |
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