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AS8FLC2M32 Datasheet(PDF) 12 Page - Austin Semiconductor |
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AS8FLC2M32 Datasheet(HTML) 12 Page - Austin Semiconductor |
12 / 29 page AUSTIN SEMICONDUCTOR, INC. FLASH FLASH FLASH FLASH FLASH AS8FLC2M32 AS8FLC2M32B Rev. 1.2 5/09 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 12 Austin Semiconductor, Inc. ERASING sectors, since the codes are not stored in the memory Array. When the device exits the Autoselect mode, the device reverts to the ERASE SUSPEND mode, and is ready for another valid operation. The system must WRITE the ERASE RESUME command to exit the ERASE SUSPEND mode and continue the SECTOR ERASE operation. Further WRITES of the RESUME command are ignored. Another ERASE SUSPEND command can be WRITTEN after the device has resumed ERASING. Erase Operation Diagram Write ERASE Command Sequence Data Poll from System ERASURE Completed Start Data = FFh? NO YES Write Operation Status The device provides several bits to determine the status of a write operation: DQ2, DQ3, DQ5, DQ6 and DQ7 of Byte 1; DQ10, DQ11, DQ13, DQ14 and DQ15 of Byte 2; DQ18, DQ19, DQ21, DQ22 and DQ23 of Byte 3; as well as, DQ26, DQ27, DQ29, DQ30 and DQ31 of Byte 4. In addition, the RY/BY\ pin is also used in the monitoring of this operation. DQ7, DQ15, DQ23 and DQ31: Data\ Polling The Data\ Polling bit per byte, indicates to the host system whether an Embedded Algorithm is in progress or completed, or whether the device is in ERASE SUSPEND. Data\ Polling is valid after the rising edge of the final WEx\ pulse in the PROGRAM or ERASE command sequence. During the Embedded Program Algorithm, the device outputs on DQ7 for Byte 1, DQ15 for Byte 2, DQ23 for Byte 3, and DQ31 for Byte 4, the complement of the datum programmed to each of these bits. This status also applies to the PROGRAMMING during ERASE SUSPEND. When the Embedded Program Algorithm is complete, the device outputs the datum PROGRAMMED into each of these status bits. The system must provide the PROGRAM address to READ valid status information. If a PROGRAM address fails within a protected sector, Data\ Polling is active for approximately 1uS, then the device returns to reading array data. During the Embedded Erase Algorithm, Data\ Polling produces a “0” on the Data\ Polling Status bits. When the Embedded ERASEAlgorithm is complete, or if the device enters the ERASE SUSPEND mode, Data\ Polling produces a “1” on each of the Data\ Polling status bits. This is analogous to the complement/ true data output described for the Embedded Program Algorithm: the ERASE function changes all the bits in a sector to “1”; prior to this, the device outputs the “compliment”, or “0”. The system must provide an address within any of the sectors selected for ERASURE to READ valid status information. After an ERASE Command sequence is WRITTEN, if all s4ctors selected for erasing are protected, Data\ Polling is active for approximately 100uS, then the device returns to READING array data. If not all selected sectors are protected, the Embedded ERASE Algorithm ERASES the unprotected sectors, and ignores the selected sectors that are protected. When the system detects a Data\ Polling status bit has changed from the complement to true data, it can READ valid data at each of the Bytes on the following READ cycles. This is because Data\ Polling Algorithm Diagram READ Byte Data Address = VA Start DQ5, DQ13, DQ21, DQ29=1? NO YES DQ7, DQ15, DQ23, DQ31= Data? NO YES READ Byte Data Address = VA DQ7, DQ15, DQ23, DQ31= Data? NO YES PASS FAIL |
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