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AM3517 Datasheet(PDF) 87 Page - Texas Instruments |
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AM3517 Datasheet(HTML) 87 Page - Texas Instruments |
87 / 184 page AM3517/05 ARM Microprocessor www.ti.com SPRS550 – OCTOBER 2009 Table 6-4. GPMC/NOR Flash Interface Switching Characteristics Synchronous Mode (continued) NO. PARAMETER 1.8V, 3.3V UNIT MIN MAX tR(CLK) Rise time, output clock gpmc_clk TBD ns tF(CLK) Fall time, output clock gpmc_clk TBD ns tR(DO) Rise time, output data TBD ns tF(DO) Fall time, output data TBD ns F2 td(CLKH-nCSV) Delay time, gpmc_clk rising edge to TBD TBD ns gpmc_ncsx(3) transition F3 td(CLKH-nCSIV) Delay time, gpmc_clk rising edge to TBD TBD ns gpmc_ncsx(3) invalid F4 td(ADDV-CLK) Delay time, address bus valid to TBD TBD ns gpmc_clk first edge F5 td(CLKH-ADDIV) Delay time, gpmc_clk rising edge to TBD ns gpmc_a[16:1] invalid F6 td(nBEV-CLK) Delay time, gpmc_nbe0_cle, gpmc_nbe1 TBD TBD ns valid to gpmc_clk first edge F7 td(CLKH-nBEIV) Delay time, gpmc_clk rising edge to TBD TBD ns gpmc_nbe0_cle, gpmc_nbe1 invalid F8 td(CLKH-nADV) Delay time, gpmc_clk rising edge to TBD TBD ns gpmc_nadv_ale transition F9 td(CLKH-nADVIV) Delay time, gpmc_clk rising edge to TBD TBD ns gpmc_nadv_ale invalid F10 td(CLKH-nOE) Delay time, gpmc_clk rising edge to TBD TBD ns gpmc_noe transition F11 td(CLKH-nOEIV) Delay time, gpcm rising edge to TBD TBD ns gpmc_noe invalid F14 td(CLKH-nWE) Delay time, gpmc_clk rising edge to TBD TBD ns gpmc_nwe transition F15 td(CLKH-Data) Delay time, gpmc_clk rising edge to data TBD TBD ns bus transition F17 td(CLKH-nBE) Delay time, gpmc_clk rising edge to TBD TBD ns gpmc_nbex_cle transition F18 tW(nCSV) Pulse duration, Read TBD ns gpmc_ncsx(3) low Write TBD ns F19 tW(nBEV) Pulse duration, Read TBD ns gpmc_nbe0_cle, Write TBD ns gpmc_nbe1 low F20 tW(nADVV) Pulse duration, Read TBD ns gpmc_nadv_ale low Write TBD ns F23 td(CLKH-IODIR) Delay time, gpmc_clk rising edge to TBD TBD ns gpmc_io_dir high (IN direction) F24 td(CLKH-IODIRIV) Delay time, gpmc_clk rising edge to TBD ns gpmc_io_dir low (OUT direction) (3) In gpmc_ncsx, x is equal to 0, 1, 2, 3, 4, 5, 6, or 7. In gpmc_waitx, x is equal to 0, 1, 2, or 3. Submit Documentation Feedback TIMING REQUIREMENTS AND SWITCHING CHARACTERISTICS 87 |
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