IDT5V50015

LOW EMI CLOCK GENERATOR

SSCG

IDT™ LOW EMI CLOCK GENERATOR

2

IDT5V50015

REV F 031109

Pin Assignment

Spread Direction and Percentage

Select Table

0 = connect to GND

1 = connect directly to VDD

Pin Descriptions

ICLK

VDD

GND

S0

SSCLK

S1

SSCC

VDD

1

2

3

4

8

7

6

5

8 pin (150 mil) SOIC/TSSOP

S1

Pin 6

S0

Pin 7

Spread

Direction

Spread

Percentage

0

0

Center

±0.5

0

1

Center

±1.0

1

0

Center

±1.5

1

1

Center

±2.0

Pin

Number

Pin

Name

Pin Type

Pin Description

1

ICLK

Input

Connect to a 130–200 MHz clock input.

2

VDD

Power

Connect to +3.3 V.

3

GND

Power

Connect to ground.

4

SSCLK

Output

Clock output with spread spectrum.

5

SSCC

Input

Spread spectrum enable/disable function. SSCC function is enabled when

input is high and disabled when input is low. This pin is pulled high internally.

6

S1

Input

Function select 1 input. Selects spread amount and direction per table above.

Internal pull-down.

7

S0

Input

Function select 0 input. Selects spread amount and direction per table above.

Internal pull-down.

8

VDD

Power

Connect to +3.3 V.