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5V50017DCG8 Datasheet(PDF) 5 Page - Integrated Device Technology |
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5V50017DCG8 Datasheet(HTML) 5 Page - Integrated Device Technology |
5 / 8 page IDT5V50017 LOW EMI CLOCK GENERATOR SSCG IDT™ LOW EMI CLOCK GENERATOR 5 IDT5V50017 REV D 040709 DC Electrical Characteristics Unless stated otherwise, VDD = 3.3 V, Ambient Temperature 0 to +70 ° C Note 1: CL = 15 pF. AC Electrical Characteristics Unless stated otherwise, VDD = 3.3 V, Ambient Temperature 0 to +70 ° C Note1: Cycle-to-cycle jitter is the maximum observed variation between two adjacent cycle’s periods over a defined number of observed cycles. The JEDEC specification for the number of cycles observed is 1000 cycles. Parameter Symbol Conditions Min. Typ. Max. Units Operating Voltage VDD 2.97 3.3 3.63 V Supply Current IDD ICLK=50 MHz, Note 1 17 20 mA Input High Voltage VIH S1: S0 2.0 V Input Low Voltage VIL S1: S0 0.8 V Output High Voltage VOH IOH = -6 mA 2.4 V IOH =- 20 mA 2.0 V Output Low Voltage VOL IOL = 6 mA 0.4 V IOL = 20 mA 1.2 V Input Capacitance CIN1 All inputs 3 4 5 pF Pull-down Resistance RPD S1, S0 240 k Ω Parameter Symbol Conditions Min. Typ. Max. Units Input Clock Frequency 15 60 MHz Output Clock Duty Cycle All outputs 45 50 55 % Short term Cycle to cycle Jitter ICLK=50 MHz, SS OFF 50 100 ps ICLK=50 MHz, SS ON 80 100 ps Short term Period Jitter SS OFF 50 100 ps One-sigma jitter SS OFF 15 ps Output Rise Time tR 20% to 80%, CL=15 pF, 50 MHz 0.9 ns Output Fall Time tF 80% to 20%, CL=15 pF, 50 MHz 0.9 ns Modulation Frequency ICLK=20 MHz 32 kHz |
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