Rev 1.0, August 7, 2008

Page 4 of 12

SL15316

General Description

The primary source of EMI from digital circuits is the

system clock and all the other synchronous clocks and

control signals derived from the system clock. The well

know techniques of filtering (suppression) and shielding

(containment), while effective, can cost money, board

space and longer development time.

A more effective and efficient technique to reduce EMI is

Spread Spectrum Clock Generator (SSCG) technique.

Instead of using constant clock frequency, the SSCG

technique modulates (spreads) the system clock with a

much smaller frequency, to reduce EMI emissions at its

source: The System Clock.

The

SL15316

is

designed

using

SpectraLinear

proprietary phase-locked loop (PLL) and Spread

Spectrum Technologies (SST) to synthesize and

modulate (spread) the system clock such that the energy

is spread out over a wider bandwidth. This reduces the

peak value of the radiated emissions at the fundamental

and the harmonics. This reduction in radiated energy

can significantly reduce the cost of complying with

regulatory agency requirements and improve time-to-

market without degrading system performance.

The SL15316 operates from 3.3V to 2.5V power supply

range. Separate VDDO power supply is provided for thre

(3) output clock drivers. The supply voltage on these pins

could be 3.3V to 25V or 1.8V as long as VDDO≤VDD

condition is met.

The SL15316 is available in 16-pin TSSOP package with

Commercial Temperature range of 0 to 70

°C and

Industrial Temperature range of –40 to 85°C.

Input Frequency Range

The input frequency range is from 8.0 to 48.0 MHz for

crystals and ceramic resonators. If an external clock is

used, the input frequency range is from 3 to 166 MHz.

Output Frequency Range and Outputs

Up to five (5) outputs can be programmed as SSCLK or

REFCLK. SSCLK output can be synthesized to any value

from 3 to 200 MHz with spread using input frequency.

The spread at SSCLK pins can be stopped by SSON#

input control pin, If SSON# pin is HIGH (VDD), the

frequency at this pin is the synthesized to the nominal

value of the input frequency and there is no spread.

REFOUT is the buffered output of the oscillator and is

the same frequency as the input frequency without

spread. However, REFOUT value can also be divided by

using the output divider. The SSCLK is the programmed

and synthesized value of the input clock. The remaining

SSCLKs could be the same value providing fanout of up

to 5 or the frequency can be divided from also 2 to 32. In

this case, the spread % value is the same as the original

programmed spread % value. By using only first order

crystals, SL15316 can synthesize output frequency up to

200 MHz, eliminating the need for higher order Crystals

(Xtals) and Crystal Oscillators (XOs). This reduces the

cost while improving the system clock accuracy,

performance and reliability.

Programmable CL (Crystal Load)

The SL15316 provides programmable on-chip capacitors

at XIN/CLKIN (Pin-3) and XOUT (Pin-2). The resolution of

this programmable capacitor is 6-bits with LSB value of

0.5pF. When all bits are off the pin capacitance is

CXIN=CXOUT =7.0pF (minimum value). When all bits are

on the pin capacitance is CXIN=CXOUT=38pF (maximum

(Crystal Load Capacitor) can be calculated as:

In addition, if an external clock is used, the capacitance at

Pin-4 (XIN/CLKIN) can programmed to control the edge

rate of this input clock, providing additional EMI control.

Programmable Modulation Frequency

The Spread Spectrum Clock (SSC) modulation default

value is 31.5 kHz. The higher values of 60, 90 and 120

kHz can also be programmed. Less than 25 kHz

modulation frequency is not recommended to stay out of

the range audio frequency bandwidth since this frequency

could be detected as a noise by the audio receivers within

the vicinity.

Programmable Spread Percent (%)

The spread percent (%) value is programmable from +/-

0.125% to +/-2.5% (center spread) or -0.25% to -5.0%

(down spread) for all SSCLK frequencies. It is possible to

program smaller or larger non-standard values of spread

percent. Contact SLI if these non-standard spread percent

values are required in the application.

SSON# or Function Select (FS)

The SL15316 Pins 7, 12 and 15 could be programmed as

either SSON# to enable or disable the programmed

spread percent value or as Frequency Select (FS). If

SSON# is used, when this pin is pulled high (VDD), the

spread is stopped and the frequency is the nominal value

without spread. If low (GND), the frequency is the nominal

value with the spread.

If FS function is used, the output pins could be

programmed for different set of frequencies or spread %

as selected by FS. SSCLK value can be any frequency

from 3 to 200MHz, but the spread % is the same percent

value. REFOUT is the same frequency as the input

reference clock or divide by from 2 to 32 without spread.

The SL15316 allows a fan-out of up to 5 clocks, meaning

that Pins 7, 11, 12, 13 and 15 can be programmed to the

same frequencies with or without spread.

Power Down (PD#) or Output Enable (OE)

The SL15316 Pins 7, 11, 12, 13 and 15 could also be

programmed as either PD# or OE. PD# powers down the

entire chip whereas OE only disables the output buffers to

Hi-Z.

Spread Spectrum Clock Modulation Frequency

The modulation frequency of spread spectrum clock can

be programmed from 25 to 120kHz.