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SS6578CSTB Datasheet(PDF) 5 Page - Silicon Standard Corp. |
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SS6578CSTB Datasheet(HTML) 5 Page - Silicon Standard Corp. |
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5 / 11 page  www.SiliconStandard.com 5 of 11 SS6578 BLOCK DIAGRAM 70mV 8 7 6 5 4 3 2 1 Current Limit Comparator Output Driver GND DRI CS+ CS- VIN PFM OSC 1.22V Reference Voltage Error Comparator DUTY FB SHDN VIN + - LATCH - + PIN DESCRIPTIONS PIN 1: VIN - Input supply voltage - a range of 4V to 18V is recommended. PIN 2: DUTY - Duty cycle adjustment pin. To be tied to the VIN pin directly or through a resistor RDUTY to adjust oscillator duty cycle. RDUTY must be over 1M Ω if V IN=20V. See TYPICAL PERFORMANCE CHARACTERISTICS. PIN 3: SHDN- Logical input to shutdown the chip: VSHDN = High for normal operation. VSHDN = Low for shutdown. This pin should not be floating or be forced to over 15V. In shutdown mode DRI pin is held high. PIN 4: FB - Feedback comparator input, to compare the feedback voltage with the internal reference voltage. Connecting a resistor R1 to converter output node and a resistor R2 to ground yields the output voltage: VOUT=1.22 x (R1+R2)/ R2 PIN 5: GND - Power ground. PIN 6: DRI - Push-pull driver output to drive an external P-channel MOSFET or PNP transistor. When driving a PNP bipolar transistor, a base resistor and a capacitor to the base of PNP are recommended. PIN 7: CS- - Current-sense comparator inverting input. This pin voltage should go over 2V but should not exceed VIN voltage. PIN 8: CS+ - Current sense comparator non-inverting input. This pin voltage should go over 2V but should not exceed VIN voltage. Rev.2.02 4/06/2004 |
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