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SS6730-33CQTR Datasheet(PDF) 10 Page - Silicon Standard Corp. |
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SS6730-33CQTR Datasheet(HTML) 10 Page - Silicon Standard Corp. |
10 / 12 page www.SiliconStandard.com 10 of 12 SS6730 POWER DISSIPATION The maximum dissipation of the SS6730 depends on the thermal resistance of the case and circuit board, the temperature difference between the die junction and ambient air, and the rate of air flow. The rate of temperature rise is greatly affected by the mounting pad configuration on the PCB, the board material, and the ambient temperature. When the IC mounting with good thermal conductivity is used, the junction will be low even if the power dissipation is great. The power dissipation across the device is P = IOUT (VIN-VOUT). The maximum power dissipation is: ) R? (R? ) T (T P BA JB A J MAX + − = where TJ-TA is the temperature difference between the die junction and the surrounding air, R θ JB is the thermal resistance of the package, and R θ BA is the thermal resistance through the PCB, copper traces, and other materials to the surrounding air. As a general rule, the lower the temperature, the better the reliability of the device, so the PCB mounting pad should provide maximum thermal conductivity to maintain low device temperature. The GND pin performs the dual function of providing an electrical connection to ground and channeling heat away. Therefore, connecting the GND pin to ground with a large pad or ground plane would increase the power dissipation and reduce the device temperature. 50 100 150 0.01 0.1 1 10 100 STABLE REGION COUT=1µF IOUT (mA) Fig. 20 Max Power Dissipation, COUT=1µF 50 100 150 0.01 0.1 1 10 100 Stable Region COUT=2.2µF IOUT (mA) Fig. 21 Max Power Dissipation, COUT=2.2µF 50 100 150 0.01 0.1 1 10 100 Stable Region COUT=3.3µF IOUT (mA) Fig. 22 Max Power Dissipation, COUT=3.3µF 50 100 150 0.01 0.1 1 10 100 Stable Region COUT=10µF IOUT (mA) Fig. 23 Max Power Dissipation, COUT=10µF 1/26/2004 Rev.2.02 |
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