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SS6804CCSTB Datasheet(PDF) 8 Page - Silicon Standard Corp. |
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SS6804CCSTB Datasheet(HTML) 8 Page - Silicon Standard Corp. |
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8 / 12 page  www.SiliconStandard.com 8 of 12 SS6804 PIN10: VC3- Input pin for battery BAT4 voltage sensing. This pin is to be connected to the positive terminal of the battery cell BAT4. PIN11: UD3 - This pin is to be connected to the positive terminal of the battery cell BAT3 for cell- balancing bleeding function under overcharge condition. PIN12: VC2 - Input pin for battery BAT3 voltage sensing. This pin is to be connected to the positive terminal of the battery cell BAT3. PIN13: UD2 - This pin is to be connected to the positive terminal of the battery cell BAT2 for cell-balancing bleeding function under overcharge condition. PIN14: VC1 - Input pin for battery BAT2 voltage sensing. This pin is to be connected to the positive terminal of the battery cell BAT2. PIN15: UD1 - positive terminal of the battery BAT1 for cell-balancing bleeding function under overcharge condition. PIN16: VCC - Power supply pin and input for battery BAT1 voltage sensing. This pin is to be connected to the positive terminal of the battery cell BAT1. APPLICATION INFORMATION THE OPERATION Initialization On initial power-up, such as connecting the battery pack for the first time to the SS6804, the SS6804 enters the power-down mode. A charger must be applied to the SS6804 circuit to enable the pack. Overcharge Protection When the voltage of either of the battery cells exceeds the overcharge protection voltage (VOCP) beyond the overcharge delay time (TOC) period, charging is inhibited by the turning-off of the charge control MOSFET M2. The overcharge delay time is set by the external capacitor CTC. Inhibition of charging is immediately released when the voltage of the overcharged cell becomes lower than overcharge release voltage (VOCR or VOCP-VHYS) through discharging. Overdischarge Protection When the voltage of either of the battery cells falls below the overdischarge protection voltage (VODP) beyond the overdischarge delay time (TOD) period, discharging is inhibited by the turning-off of the discharge control MOSFET M1. The overdischarge delay time is set by the external capacitor CTD. Inhibition of discharging is immediately released when the voltage of the overdischarge cell becomes higher than the overdischarge release voltage (VODR) through charging. Overcurrent Protection In normal mode, the SS6804 continuously monitors the discharge current by sensing the voltage of CS pin. If the voltage VCC-VCS exceeds the overcurrent protection voltage (VOIP) beyond the overcurrent delay time (TOI) period, the overcurrent protection circuit operates and discharging is inhibited by the turning-off of the discharge control MOSFET M1. Discharging must be inhibited for at least 256ms after overcurrent takes place to avoid damage to external control MOSFETs due to rapidly switching transient between BATT+ and BATT- terminals. The overcurrent condition returns to normal mode when the load is released and the impedance between the BATT+ and BATT- terminals is 20M Ω or higher. The SS6804 is provided with the three 12/29/2003 Rev.2.02 |
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