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74ABT543A Datasheet(PDF) 7 Page - NXP Semiconductors |
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74ABT543A Datasheet(HTML) 7 Page - NXP Semiconductors |
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7 / 15 page  74ABT543A_3 © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 03 — 26 January 2010 7 of 15 NXP Semiconductors 74ABT543A Octal latched transceiver with dual enable; 3-state 11. Waveforms tPZL OFF-state to LOW propagation delay OEBA to An, OEAB to Bn; see Figure 8 2.0 4.3 5.9 2.0 6.6 ns EBA to An, EAB to Bn; see Figure 8 2.0 4.4 6.1 2.0 6.8 ns tPHZ HIGH to OFF-state propagation delay OEBA to An, OEAB to Bn; see Figure 7 2.0 4.0 5.7 2.0 6.2 ns EBA to An, EAB to Bn; see Figure 7 2.0 3.6 5.4 2.0 5.9 ns tPLZ LOW to OFF-state propagation delay OEBA to An, OEAB to Bn; see Figure 8 1.0 3.0 4.6 1.0 5.0 ns EBA to An, EAB to Bn; see Figure 8 1.0 3.0 4.6 1.0 5.0 ns tsu(H) set-up time HIGH An to LEAB, Bn to LEBA; see Figure 9 2.5 1.0 - 2.5 - ns An to EAB, Bn to EBA; see Figure 9 3.5 1.3 - 3.5 - ns tsu(L) set-up time LOW An to LEAB, Bn to LEBA; see Figure 9 3.0 1.4 - 3.0 - ns An to EAB, Bn to EBA; see Figure 9 3.0 1.4 - 3.0 - ns th(H) hold time HIGH LEAB to An, LEBA to Bn; see Figure 9 +0.5 −0.8 - 0.5 - ns EAB to An, EBA to Bn; see Figure 9 +0.5 −0.8 - 0.5 - ns th(L) hold time LOW LEAB to An, LEBA to Bn; see Figure 9 +0.5 −0.6 - 0.5 - ns EAB to An, EBA to Bn; see Figure 9 +0.5 −0.6 - 0.5 - ns tWL pulse width LOW latch enable; see Figure 9 3.5 1.0 - 3.5 - ns Table 7. Dynamic characteristics …continued GND = 0 V; for test circuit, see Figure 10. Symbol Parameter Conditions 25 °C; V CC = 5.0 V −40 °C to +85 °C; VCC = 5.0 V ± 0.5 V Unit Min Typ Max Min Max VM = 1.5 V. VOL and VOH are typical voltage output levels that occur with the output load. Fig 5. Propagation delay input (An, Bn) to output (Bn, An) 001aae904 An or Bn Bn or An VM GND VI VOH VOL VM tPLH tPHL VM VM |
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