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74AUP2G08 Datasheet(PDF) 10 Page - NXP Semiconductors

No. de pieza 74AUP2G08
Descripción Electrónicos  Low-power dual 2-input AND gate
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Fabricante Electrónico  NXP [NXP Semiconductors]
Página de inicio  http://www.nxp.com
Logo NXP - NXP Semiconductors

74AUP2G08 Datasheet(HTML) 10 Page - NXP Semiconductors

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74AUP2G08_3
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 03 — 29 May 2008
10 of 17
NXP Semiconductors
74AUP2G08
Low-power dual 2-input AND gate
[1]
For measuring enable and disable times, RL = 5 kΩ.
For measuring propagation delays, set-up and hold times and pulse width, RL =1MΩ.
Test data is given in Table 10.
Definitions for test circuit:
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to the output impedance Zo of the pulse generator.
VEXT = External voltage for measuring switching times.
Fig 9.
Load circuit for measuring switching times
001aac521
DUT
RT
VI
VO
VEXT
VCC
RL
5 k
CL
G
Table 10.
Test data
Supply voltage
Load
VEXT
VCC
CL
RL[1]
tPLH, tPHL
tPZH, tPHZ
tPZL, tPLZ
0.8 V to 3.6 V
5 pF, 10 pF, 15 pF and 30 pF
5 k
Ω or 1 MΩ
open
GND
2
× VCC


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