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74LVC2G240GM Datasheet(PDF) 4 Page - NXP Semiconductors

No. de pieza 74LVC2G240GM
Descripción Electrónicos  Dual inverting buffer/line driver; 3-state
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Fabricante Electrónico  NXP [NXP Semiconductors]
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74LVC2G240GM Datasheet(HTML) 4 Page - NXP Semiconductors

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74LVC2G240_4
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 04 — 29 February 2008
4 of 16
NXP Semiconductors
74LVC2G240
Dual inverting buffer/line driver; 3-state
7.
Functional description
[1]
H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state.
8.
Limiting values
[1]
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2]
When VCC = 0 V (Power-down mode), the output voltage can be 5.5 V in normal operation.
[3]
For TSSOP8 packages: above 55
°C the value of P
tot derates linearly at 2.5 mW/K.
For VSSOP8 packages: above 110
°C the value of P
tot derates linearly at 8.0 mW/K.
For XSON8 and XQFN8U packages: above 45
°C the value of P
tot derates linearly at 2.4 mW/K.
Table 4.
Function table[1]
Input
Output
nOE
nA
nY
LLH
LH
L
HX
Z
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Conditions
Min
Max
Unit
VCC
supply voltage
−0.5
+6.5
V
IIK
input clamping current
VI < 0 V
−50
-
mA
VI
input voltage
[1]
−0.5
+6.5
V
IOK
output clamping current
VO > VCC or VO <0 V
-
±50
mA
VO
output voltage
Enable mode
[1]
−0.5
VCC + 0.5
V
Disable mode
[1]
−0.5
+6.5
V
Power-down mode
[1][2]
−0.5
+6.5
V
IO
output current
VO = 0 V to VCC
-
±50
mA
ICC
supply current
-
100
mA
IGND
ground current
−100
-
mA
Tstg
storage temperature
−65
+150
°C
Ptot
total power dissipation
Tamb = −40 °C to +125 °C
[3] -
300
mW


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