74LVT_LVTH16374A_7

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Product data sheet

Rev. 07 — 22 March 2010

3 of 19

NXP Semiconductors

74LVT16374A; 74LVTH16374A

3.3 V 16-bit edge-triggered D-type flip-flop; 3-state

5.

Pinning information

5.1 Pinning

Fig 3.

Logic diagram

001aac371

D

CP

Q

nD0

nCP

nOE

nQ0

D

CP

Q

nD1

nQ1

D

CP

Q

nD2

nQ2

D

CP

Q

nD3

nQ3

D

CP

Q

nD4

nQ4

D

CP

Q

nD5

nQ5

D

CP

Q

nD6

nQ6

D

CP

Q

nD7

nQ7

Fig 4.

Pin configuration for SOT370-1 (SSOP48) and

SOT362-1 (TSSOP48)

Fig 5.

Pin configuration for SOT702-1 (VFBGA56)

74LVT16374A

74LVTH16374A

1OE

1CP

1Q0

1D0

1Q1

1D1

GND

GND

1Q2

1D2

1Q3

1D3

1Q4

1D4

1Q5

1D5

GND

GND

1Q6

1D6

1Q7

1D7

2Q0

2D0

2Q1

2D1

GND

GND

2Q2

2D2

2Q3

2D3

2Q4

2D4

2Q5

2D5

GND

GND

2Q6

2D6

2Q7

2D7

2OE

2CP

001aak263

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

48

47

46

45

44

43

42

41

40

39

38

37

36

35

34

33

32

31

30

29

28

27

26

25

001aak264

74LVT16374A

74LVTH16374A

Transparent top view

K

J

H

G

F

E

C

B

A

D

246

135

ball A1

index area