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ADC1003S040 Datasheet(PDF) 8 Page - NXP Semiconductors |
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ADC1003S040 Datasheet(HTML) 8 Page - NXP Semiconductors |
8 / 20 page ADC1003S030_040_050_2 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 7 August 2008 8 of 20 NXP Semiconductors ADC1003S030/040/050 Single 10 bits ADC, up to 30 MHz, 40 Mhz or 50 MHz, with voltage regulator Harmonics (fclk = 40 MHz); see Figure 7 and Figure 8 α1H first harmonic level fi = 4.43 MHz - - 0 dB α2H second harmonic level fi = 4.43 MHz - −70 −63 dB α3H third harmonic level fi = 4.43 MHz - −72 −63 dB THD total harmonic distortion fi = 4.43 MHz - −61 - dB Signal-to-noise ratio; see Figure 7 and Figure 8[7] S/N signal-to-noise ratio full-scale: without harmonics; fclk = 40 MHz; fi = 4.43 MHz 55 58 - dB Effective bits; see Figure 7 and Figure 8[7] ENOB effective number of bits ADC1003S030TS; fclk =30MHz fi = 4.43 MHz - 9.4 bit fi = 7.5 MHz - 9.1 bit ADC1003S040TS; fclk = 40 MHz; fi = 4.43 MHz - 9.3 - bit fi = 7.5 MHz - 9.0 - bit fi = 10 MHz - 8.9 - bit fi = 15 MHz - 8.1 - bit ADC1003S050TS; fclk =50MHz fi = 4.43 MHz - 9.3 - bit fi = 7.5 MHz - 8.9 - bit fi = 10 MHz - 8.8 - bit fi = 15 MHz - 8.0 - bit Two-tone[8] αIM intermodulation suppression fclk = 40 MHz - −69 - dB Bit error rate BER bit error rate fclk = 50 MHz; fi = 4.43 MHz; VI = ±16 LSB at code 512 -10−13 - times/sample Differential gain[9] Gdif differential gain fclk = 40 MHz; PAL modulated ramp - 0.8 - % Table 6. Characteristics …continued VCCA = V3 to V4 = 4.75 V to 5.25 V; VCCD = V11 to V12 and V28 to V27 = 4.75 V to 5.25 V; VCCO = V13 to V14 = 3.0 V to 5.25 V; AGND and DGND shorted together; Tamb = 0 °C to 70 °C; typical values measured at VCCA = VCCD = 5 V and VCCO = 3.3 V; CL = 15 pF and Tamb = 25 °C; unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit |
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