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TPS40200DRG4 Datasheet(PDF) 3 Page - Texas Instruments |
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TPS40200DRG4 Datasheet(HTML) 3 Page - Texas Instruments |
3 / 46 page THERMAL CHARACTERISTICS (1) TPS40200 www.ti.com ........................................................................................................................................ SLUS659D – FEBRUARY 2006 – REVISED NOVEMBER 2008 ELECTRICAL CHARACTERISTICS (continued) –40°C < TA = TJ < 85°C, VDD = 12 V, fOSC = 100 kHz (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT SOFT START Internal soft-start pull-up 65 105 170 RSS(chg) resistance k Ω Internal soft-start pull-down 190 305 485 RSS(dchg) resistance VSSRST Soft-start reset threshold 100 150 200 mV OVERCURRENT PROTECTION 0°C < TA < 125°C 65 100 140 VILIM Overcurrent threshold 4.5 < VVDD < 52 mV –40°C < TA < 125°C 55 100 140 OCDF Overcurrent duty cycle (1) 2 % VILIM(rst) Overcurrent reset threshold 100 150 200 mV OSCILLATOR Oscillator frequency range (1) 35 500 fOSC RRC = 200 kΩ, CRC = 470 pF 85 100 115 kHz Oscillator frequency RRC = 68.1 kΩ, CRC = 470 pF 255 300 345 12 V < VVDD < 52 V -9 0 Frequency line regulation % 4.5 V < VVDD < 12 V –20 0 VRMP Ramp amplitude 4.5 V < VVDD < 52 V VDD÷10 V PULSE WIDTH MODULATOR Minimum controllable pulse VVDD = 12 V 200 400 width. See Figure 24 for for VVDD = 30 V 100 200 tMIN ns tMIN vs fOSC at various input voltages. fosc = 100 kHz, CL = 470 pF 93 95 DMAX Maximum duty cycle % fosc = 300 kHz, CL = 470 pF 90 93 KPWM Modulator and power stage dc 8 10 12 V/V gain ERROR AMPLIFIER IIB Input bias current 100 250 nA AOL Open loop gain (1) 60 80 dB GBWP Unity gain bandwidth (1) 1.5 3 MHz ICOMP(src) Output source current VFB = 0.6 V, COMP = 1 V 100 250 µA ICOMP(snk) Output sink current VFB = 1.2 V, COMP = 1 V 1.0 2.5 mA (1) Ensured by design. Not production tested. over operating free-air temperature range (unless otherwise noted) PACKAGE PARAMETER MIN TYP MAX UNIT SOIC (D) θ JC Thermal resistance, junction-to-case 49 θ JC Thermal resistance, junction-to-case 85 θ JB Thermal resistance, junction-to-board 21 °C/W QFN (DRB) θ JP Thermal resistance, junction-to-pad 8 θ JA Thermal resistance, junction-to-ambient (natural convection) 67 (1) TI uses test boards designed to JESD 51-3 and JESD 51-7 for thermal-impedance measurements. The parameters outlined in these standards also are used to set up thermal models. TI uses the thermal-model program ThermCAL, a finite-difference thermal-modeling tool. Using this test procedure, the junction-to-case thermal resistance of this part is 49°C/W. For more information see TI Technical Brief SZZA017. Copyright © 2006–2008, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Link(s): TPS40200 |
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