DAC1203D160HW datasheet(8/19 Pages) NXP

No. de pieza	DAC1203D160HW

Descripción Electrónicos	Dual 12 bits DAC, up to 160 MHz, 2 x interpolating

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Fabricante Electrónico	NXP [NXP Semiconductors]

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DAC1203D160_2

Product data sheet

Rev. 02 — 14 August 2008

8 of 19

NXP Semiconductors

DAC1203D160

Dual 12 bits DAC, up to 160 MHz, 2 x interpolating

10. Characteristics

Table 5.

Characteristics

VCCD =VCCA = 3.0 V to 3.6 V; AGND and DGND connected together; Tamb = −40 °C to +85 °C; typical values measured at

VCCD =VCCA = 3.3 V, IO(fs) = 20 mA and Tamb =25 °C; dynamic parameters measured using output schematic given in

Figure 10; unless otherwise speciﬁed.

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

Supplies

VCCD

digital supply voltage

3.0

3.3

3.6

V

VCCA

analog supply voltage

3.0

3.3

3.6

V

ICCD

digital supply current

-

55

65

mA

ICCA

analog supply current

-

73

85

mA

Ptot

total power dissipation

fclk = 80 MHz;

fIOUT =fQOUT = 5 MHz

-

422

540

mW

Clock inputs (CLK and CLKN)

VI(cm)

common-mode input

voltage

-

1.65

-

V

∆Vi(dif)

differential input voltage

variation

-

1.0

-

V

Analog outputs (IOUT, IOUTN, QOUT and QOUTN)

IO(fs)

full-scale output current

differential outputs

4

-

20

mA

Ro

output resistance

[1] -

150

-

k

Ω

Co

output capacitance

[1] -3

-

pF

Digital inputs (I0 to I11, Q0 to Q11 and GAPD)

VIL

LOW-level input voltage

DGND

-

0.3 VCCD

V

VIH

HIGH-level input voltage

0.7 VCCD

-VCCD

V

IIL

LOW-level input current

VIL = 0.3 VCCD

-5

-

µA

IIH

HIGH-level input current

VIH = 0.7 VCCD

-5

-

µA

Reference voltage output (GAPOUT)

VGAPOUT

voltage on pin GAPOUT

-

1.31

-

V

IGAPOUT

current on pin GAPOUT

external voltage

-

1

-

µA

∆VGAPOUT voltage variation on pin

GAPOUT

-

±133

-

ppm/

°C

Clock timing inputs (CLK and CLKN)

fclk

clock frequency

-

80

MHz

tw(clk)H

HIGH clock pulse width

5

-

ns

tw(clk)L

LOW clock pulse width

5

-

ns

Input timing (I0 to I11 and Q0 to Q11); see Figure 5

th(i)

input hold time

1.1

-

3.4

ns

tsu(i)

input set-up time

−1.5

-

+0.7

ns

Output timing (IOUT, IOUTN, QOUT and QOUTN)

ts

settling time

to

±0.5 LSB

[1] -40

-

ns

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DAC1203D160HW Datasheet(PDF) 8 Page - NXP Semiconductors

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