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KM416S8030B Datasheet(PDF) 2 Page - Samsung semiconductor |
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KM416S8030B Datasheet(HTML) 2 Page - Samsung semiconductor |
2 / 11 page KM416S8030B Rev. 0.1 Jun. 1999 CMOS SDRAM Revision History Revision 0.0 (May 15, 1999) • Changed tRDL from 1CLK to 2CLK in OPERATING AC PARAMETER. • Skip ICC4 value of CL=2 in DC characteristics in datasheet. • Define a new parameter of tDAL( 2CLK +20ns), Last data in to Active delay in OPERATING AC PARAMETER. • Eliminated FREQUENCY vs.PARAMETER RELATIONSHIP TABLE. Revision 0.1 (Jun 28, 1999) • Added Notes @OPERATING AC PARAMETER Notes : 5. For -8/H/L, tRDL=1CLK and tDAL=1CLK+20ns is also supported . SAMSUNG recommands tRDL=2CLK and tDAL=2CLK + 20ns. • Added -10 bining product. • Symbol Change Notice Before After IIL Input leakage current (inputs) ILI Input leakage current IIL Input leakage current (I/O pins) IOL Output open @ DC characteristic table Io Output open @ DC characteristic table • Test Condition in DC CHARACTERISTIC Change Notice Symbol Before After ICC2P , ICC3P CKE ≤ VIL(max), tCC = 15ns CKE ≤ VIL(max), tCC = 10ns ICC2N , ICC3N CKE ≥ VIH(min), CS ≥ VIH(min), tCC = 15ns Input signals are changed one time during 30ns CKE ≥ VIH(min), CS ≥ VIH(min), tCC = 10ns Input signals are changed one time during 20ns ICC4 2 Banks activated 4 Banks activated |
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