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KM681002C-12 Datasheet(PDF) 8 Page - Samsung semiconductor |
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KM681002C-12 Datasheet(HTML) 8 Page - Samsung semiconductor |
8 / 9 page KM681002C/CL, KM681002CI/CLI CMOS SRAM PRELIMINARY Revision 2.0 - 8 - March 2000 PRELIMINARY DATA RETENTION CHARACTERISTICS*(TA=0 to 70 °C) * The above parameters are also guaranteed at industrial temperature range. Data Retention Characteristic is for L-ver only. Parameter Symbol Test Condition Min. Typ. Max. Unit VCC for Data Retention VDR CS ≥VCC-0.2V 2.0 - 5.5 V Data Retention Current IDR VCC=3.0V, CS ≥VCC-0.2V VIN ≥VCC-0.2V or VIN≤0.2V - - 0.4 mA VCC=2.0V, CS ≥VCC-0.2V VIN ≥VCC-0.2V or VIN≤0.2V - - 0.3 Data Retention Set-Up Time tSDR See Data Retention Wave form(below) 0 - - ns Recovery Time tRDR 5 - - ms DATA RETENTION WAVE FORM CS controlled VCC 4.5V VIH VDR CS GND Data Retention Mode CS ≥VCC - 0.2V tSDR tRDR |
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