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ISL3179EFUZ Datasheet(PDF) 6 Page - Intersil Corporation |
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ISL3179EFUZ Datasheet(HTML) 6 Page - Intersil Corporation |
6 / 17 page 6 FN6365.2 April 22, 2008 Receiver Enable to Output Low tZL RL = 1kΩ, CL = 15pF, SW = VCC (Figure 6), (Note 7) Full - 11 15 ns Receiver Disable from Output High tHZ RL = 1kΩ, CL = 15pF, SW = GND (Figure 6) Full - 10 15 ns Receiver Disable from Output Low tLZ RL = 1kΩ, CL = 15pF, SW = VCC (Figure 6) Full - 10 15 ns Time to Shutdown tSHDN (Note 8) Full 60 - 600 ns Receiver Enable from Shutdown to Output High tZH(SHDN) RL = 1kΩ, CL = 15pF, SW = GND (Figure 6), (Notes 8, 10) Full - - 1000 ns Receiver Enable from Shutdown to Output Low tZL(SHDN) RL = 1kΩ, CL = 15pF, SW = VCC (Figure 6), (Notes 8, 10) Full - - 1000 ns NOTES: 3. All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to device ground unless otherwise specified. 4. Supply current specification is valid for loaded drivers when DE = 0V. 5. Applies to peak current. See “Typical Performance Curves” on page 11 for more information. 6. Because of the shutdown feature, keep RE = 0 to prevent the device from entering SHDN. 7. Because of the shutdown feature, the RE signal high time must be short enough (typically <100ns) to prevent the device from entering SHDN. 8. These IC’s are put into shutdown by bringing RE high and DE low. If the inputs are in this state for less than 60ns, the parts are guaranteed not to enter shutdown. If the inputs are in this state for at least 700ns, the parts are guaranteed to have entered shutdown. See “Low Power Shutdown Mode” on page 10. 9. Keep RE = VCC, and set the DE signal low time >700ns to ensure that the device enters SHDN. 10. Set the RE signal high time >700ns to ensure that the device enters SHDN. 11. This is the part-to-part skew between any two units tested with identical test conditions (Temperature, VCC, etc.). 12. VCC = 3.3V ±5% 13. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization and are not production tested. Test Circuits and Waveforms FIGURE 1A. VOD AND VOC FIGURE 1B. VOD WITH COMMON MODE LOAD FIGURE 1. DC DRIVER TEST CIRCUITS Electrical Specifications Test Conditions: VCC = 3.0V to 3.6V; Typicals are at VCC = 3.3V, TA = +25°C. (Note 3) (Continued) PARAMETER SYMBOL TEST CONDITIONS TEMP (°C) MIN (Note 13) TYP MAX (Note 13) UNITS D DE DI VCC VOD VOC RL/2 RL/2 Z Y D DE DI VCC VOD 375 Ω 375 Ω Z Y RL = 60Ω VCM -7V TO +12V ISL3179E, ISL3180E |
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