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LC75817E Datasheet(Hoja de datos) 5 Page - Sanyo Semicon Device

No. de Pieza. LC75817E
Descripción  1/8 to 1/10 Duty Dot Matrix LCD Display Controller/Driver with Key Input Function
Descarga  43 Pages
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Fabricante  SANYO [Sanyo Semicon Device]
Página de inicio  http://www.ssdc-jp.com/eng/
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 5 page
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No. 6144-5/43
LC75817E, 75817W
Parameter
Symbol
Conditions
Ratings
Unit
min
typ
max
Hysteresis
VH
CE, CL, DI, INH, KI1 to KI5
0.1 VDD
V
Power-down detection voltage
VDET
2.5
3.0
3.5
V
Input high level current
IIH
CE, CL, DI, INH, OSCI: VI = 6.0 V
5.0
µA
Input low level current
IIL
CE, CL, DI, INH, OSCI: VI = 0 V
–5.0
µA
Input floating voltage
VIF
KI1 to KI5
0.05 VDD
V
Pull-down resistance
RPD
KI1 to KI5: VDD = 5.0 V
50
100
250
k
Output off leakage current
IOFFH
DO: VO = 6.0 V
6.0
µA
VOH1
S1 to S60: IO = –20 µA
VLCD0 – 0.6
V
VOH2
COM1 to COM10: IO = –100 µA
VLCD0 – 0.6
V
Output high level voltage
VOH3
KS1 to KS6: IO = –500 µA
VDD – 1.0 VDD – 0.5
VDD – 0.2
V
VOH4
P1 to P4: IO = –1 mA
VDD – 1.0
V
VOH5
OSCO: IO = –500 µA
VDD – 1.0
V
VOL1
S1 to S60: IO = 20 µA
VLCD4 + 0.6
V
VOL2
COM1 to COM10: IO = 100 µA
VLCD4 + 0.6
V
Output low level voltage
VOL3
KS1 to KS6: IO = 25 µA
0.2
0.5
1.5
V
VOL4
P1 to P4: IO = 1 mA
1.0
V
VOL5
OSCO: IO = 500 µA
1.0
V
VOL6
DO: IO = 1 mA
0.1
0.5
V
VMID1
S1 to S60: IO ±20 µA
2/4 (VLCD0 – VLCD4) – 0.6
2/4 (VLCD0 – VLCD4) + 0.6
V
Output middle level voltage*2
VMID2
COM1 to COM10: IO = ±100 µA
3/4 (VLCD0 – VLCD4) – 0.6
3/4 (VLCD0 – VLCD4) + 0.6
V
VMID3
COM1 to COM10: IO = ±100 µA
1/4 (VLCD0 – VLCD4) – 0.6
1/4 (VLCD0 – VLCD4) + 0.6
V
Oscillator frequency
fOSC
OSCI, OSCO: ROSC = 33 kΩ, COSC = 220 pF
210
300
390
kHz
IDD1VDD: sleep mode
100
µA
IDD2VDD: VDD = 6.0 V, output open, fOSC = 300 kHz
500
1000
µA
Current drain
ILCD1VLCD: sleep mode
5µA
ILCD2
VLCD: VLCD = 10.0 V, output open, fOSC = 300 kHz
450
900
µA
When the display contrast adjustment circuit is used.
ILCD3
VLCD: VLCD = 10.0 V, output open, fOSC = 300 kHz
200
400
µA
When the display contrast adjustment circuit is not used.
Electrical Characteristics for the Allowable Operating Ranges
Note: *2. Excluding the bias voltage generation divider resistor built into the VLCD0, VLCD1, VLCD2, VLCD3, and VLCD4. (See figure 1.)
Excluding these resistors
To the common and segment drivers
Figure 1




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