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TPS3808 Datasheet(PDF) 2 Page - Texas Instruments |
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TPS3808 Datasheet(HTML) 2 Page - Texas Instruments |
2 / 158 page SM320F28335-HT SPRS682 – DECEMBER 2010 www.ti.com Contents 1 SM320F28335 DSC ............................................................................................................. 10 1.1 Features .................................................................................................................... 10 1.2 SUPPORTS EXTREME TEMPERATURE APPLICATIONS ......................................................... 11 2 Introduction ...................................................................................................................... 12 2.1 Pin Assignments ........................................................................................................... 13 2.2 Signal Descriptions ........................................................................................................ 18 3 Functional Overview .......................................................................................................... 26 3.1 Memory Maps .............................................................................................................. 27 3.2 Brief Descriptions .......................................................................................................... 31 3.2.1 C28x CPU ....................................................................................................... 31 3.2.2 Memory Bus (Harvard Bus Architecture) .................................................................... 31 3.2.3 Peripheral Bus .................................................................................................. 31 3.2.4 Real-Time JTAG and Analysis ................................................................................ 32 3.2.5 External Interface (XINTF) .................................................................................... 32 3.2.6 Flash ............................................................................................................. 32 3.2.7 M0, M1 SARAMs ............................................................................................... 32 3.2.8 L0, L1, L2, L3, L4, L5, L6, L7 SARAMs ..................................................................... 32 3.2.9 Boot ROM ....................................................................................................... 33 3.2.10 Security .......................................................................................................... 33 3.2.11 Peripheral Interrupt Expansion (PIE) Block ................................................................. 34 3.2.12 External Interrupts (XINT1-XINT7, XNMI) ................................................................... 35 3.2.13 Oscillator and PLL .............................................................................................. 35 3.2.14 Watchdog ........................................................................................................ 35 3.2.15 Peripheral Clocking ............................................................................................. 35 3.2.16 Low-Power Modes .............................................................................................. 35 3.2.17 Peripheral Frames 0, 1, 2, 3 (PFn) ........................................................................... 36 3.2.18 General-Purpose Input/Output (GPIO) Multiplexer ......................................................... 36 3.2.19 32-Bit CPU-Timers (0, 1, 2) ................................................................................... 36 3.2.20 Control Peripherals ............................................................................................. 37 3.2.21 Serial Port Peripherals ......................................................................................... 37 3.3 Register Map ............................................................................................................... 38 3.4 Device Emulation Registers .............................................................................................. 39 3.5 Interrupts .................................................................................................................... 40 3.5.1 External Interrupts .............................................................................................. 44 3.6 System Control ............................................................................................................ 44 3.6.1 OSC and PLL Block ............................................................................................ 46 3.6.1.1 External Reference Oscillator Clock Option .................................................... 47 3.6.1.2 PLL-Based Clock Module ......................................................................... 47 3.6.1.3 Loss of Input Clock ................................................................................ 49 3.6.2 Watchdog Block ................................................................................................. 49 3.7 Low-Power Modes Block ................................................................................................. 50 4 Peripherals ....................................................................................................................... 51 4.1 DMA Overview ............................................................................................................. 51 4.2 32-Bit CPU-Timers 0/1/2 ................................................................................................. 53 4.3 Enhanced PWM Modules (ePWM1/2/3/4/5/6) ......................................................................... 55 2 Contents Copyright © 2010, Texas Instruments Incorporated |
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