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SB340 Datasheet(PDF) 4 Page - Fairchild Semiconductor |
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SB340 Datasheet(HTML) 4 Page - Fairchild Semiconductor |
4 / 12 page AN-9719 APPLICATION NOTE © 2010 Fairchild Semiconductor Corporation www.fairchildsemi.com Rev. 1.0.0 • 11/2/10 4 3. Design Example Flyback converters have two kinds of operation modes; Continuous Conduction Mode (CCM) and Discontinuous Conduction Mode (DCM). Each has its own advantages and disadvantages. In general, DCM generates lower stress for the rectifier diodes, since the diodes are operating at zero current just before becoming reverse biased and the reverse recovery loss is minimized. The transformer size can be reduced using DCM because the average energy storage is low compared to CCM. However, DCM causes high RMS current, which severely increases the conduction loss of the MOSFET for low line condition. For standby auxiliary power supply applications with low output voltage and minimal reverse recovery of Schottky diode, it is typical to design the converter such that the converter operates in CCM to maximize efficiency. This section presents a design procedure using the Figure 1 schematic as a reference. An offline SMPS with 12W nominal output power has been selected as the example. [STEP-1] Define the System Specifications When designing a power supply, the following specifications should be determined first: Line Voltage Range ( V and V ) Line Frequency ( fL) Nominal Output Power ( PO) Estimate Efficiencies for Nominal Load ( η). The power conversion efficiency must be estimated to calculate the input power for nominal load condition. If no reference data is available, set η = 0.7~0.75 for low- voltage output applications and η = 0.8~0.85 for high- voltage output applications. With the estimated efficiency, the input power for peak load condition is given by: η (1) (Design Example) The specifications of the target system are: V 90V V 264V Line frequency ( f ) = 60Hz Nominal output power ( P ) = 12W (12V/1A) Estimated efficiency ( η) = 0.8 η 12 0.8 15 [STEP-2] Determine Input Capacitor (CIN) and Input Voltage Range It is typical to select the input capacitor as 2~3 μF per watt of peak input power for the universal input range (85- 265VRMS) and 1μF per watt of peak input power for the European input range (195V-265VRMS). With the input capacitor chosen, the minimum input capacitor voltage at nominal-load condition is obtained as: 2· · 1 · (2) where DCH is the input capacitor charging duty ratio defined in Figure 8, which is typically about 0.2. The maximum input capacitor voltage is given as: √2 (3) Figure 8. Input Capacitor Voltage Waveform (Design Example) By choosing 20 μF for input capacitor, the minimum input voltage for nominal load is obtained as: 2· · 1 · 2 · 90 15 · 1 0.2 20 · 10 ·60 79 The maximum input voltage is obtained as: √2 · √2 · 264 373 [STEP-3] Determine the Reflected Output Voltage (VRO) When the MOSFET is turned off, the input voltage (VIN), together with the output voltage reflected to the primary (VRO), are imposed across the MOSFET, as shown in Figure 9. With a given V RO, the maximum duty cycle (DMAX) and the nominal MOSFET voltage (VDS NOM) are obtained as: (4) (5) · (6) |
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