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AD9484-500EBZ Datasheet(PDF) 3 Page - Analog Devices |
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AD9484-500EBZ Datasheet(HTML) 3 Page - Analog Devices |
3 / 24 page AD9484 Rev. A | Page 3 of 24 SPECIFICATIONS DC SPECIFICATIONS AVDD = 1.8 V, DRVDD = 1.8 V, TMIN = −40°C, TMAX = +85°C, fIN = −1.0 dBFS, full scale = 1.5 V, unless otherwise noted. Table 1. Parameter1 Temp Min Typ Max Unit RESOLUTION 8 Bits ACCURACY No Missing Codes Full Guaranteed Offset Error 25°C 0 mV Full −3.0 +3.0 mV Gain Error 25°C 1.0 % FS Full −5.0 +7.0 % FS Differential Nonlinearity (DNL) 25°C ±0.13 LSB Full −0.25 +0.25 LSB Integral Nonlinearity (INL) 25°C ±0.1 LSB Full −0.15 +0.15 LSB INTERNAL REFERENCE VREF Full 0.71 0.75 0.78 V TEMPERATURE DRIFT Offset Error Full 18 μV/°C Gain Error Full 0.07 %/°C ANALOG INPUTS (VIN+, VIN−) Differential Input Voltage Range2 Full 1.18 1.5 1.6 V p-p Input Common-Mode Voltage Full 1.7 V Input Resistance (Differential) Full 1 kΩ Input Capacitance (Differential) Full 1.3 pF POWER SUPPLY AVDD Full 1.75 1.8 1.9 V DRVDD Full 1.75 1.8 1.9 V Supply Currents IAVDD3 Full 283 300 mA IDRVDD3/SDR Mode4 Full 89 100 mA Power Dissipation SDR Mode4 Full 670 720 mW Standby Mode Full 40 50 mW Power-Down Mode Full 2.5 7 mW 1 See the AN-835 Application Note, Understanding High Speed ADC Testing and Evaluation, for a complete set of definitions and how these tests were completed. 2 The input range is programmable through the SPI, and the range specified reflects the nominal values of each setting. See the section. Memory Map 3 IAVDD and IDRVDD are measured with a −1 dBFS, 10.3 MHz sine input at a rated sample rate. 4 Single data rate mode; this is the default mode of the AD9484. |
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