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ADRF6702 Datasheet(PDF) 8 Page - Analog Devices

No. de pieza ADRF6702
Descripción Electrónicos  1550 MHz to 2650 MHz Quadrature Modulator with 2100 MHz to 2600 MHz Frac-N PLL
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ADRF6703
Rev. 0 | Page 8 of 36
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
PIN 1
INDICATOR
NOTES
1. NC = NO CONNECT. DO NOT CONNECT TO THIS PIN.
2. THE EXPOSED PADDLE SHOULD BE SOLDERED TO A
LOW IMPEDANCE GROUND PLANE.
1
VCC1
2
DECL1
3
CP
4
GND
5
RSET
6
REFIN
7
GND
8
MUXOUT
9
DECL2
10
VCC2
23 GND
24 NC
25 GND
26 RFOUT
27 VCC5
28 GND
29 VCC6
30 GND
22 VCC4
21 GND
TOP VIEW
(Not to Scale)
ADRF6703
Figure 3. Pin Configuration
Table 5. Pin Function Descriptions
Pin No.
Mnemonic
Description
1, 10, 17, 22, 27, 29, 34
VCC1, VCC2, VCC3,
VCC4, VCC5, VCC6,
VCC7
Power Supply Pins. The power supply voltage range is 4.75 V to 5.25 V. Drive all of
these pins from the same power supply voltage. Decouple each pin with 100 pF and
0.1 μF capacitors located close to the pin.
2
DECL1
Decoupling Node for Internal 3.3 V LDO. Decouple this pin with 100 pF and 0.1 μF
capacitors located close to the pin.
3
CP
Charge Pump Output Pin. Connect VTUNE to this pin through the loop filter. If
an external VCO is being used, connect the output of the loop filter to the VCO’s
voltage control pin. The PLL control loop should then be closed by routing the VCO’s
frequency output back into the ADRF6703 through the LON and LOP pins.
4, 7, 11, 15, 20, 21, 23,
25, 28, 30, 31, 35
GND
Ground. Connect these pins to a low impedance ground plane.
24
NC
Do not connect to this pin.
5
RSET
Charge Pump Current. The nominal charge pump current can be set to 250 μA, 500 μA,
750 μA, or 1000 μA using DB10 and DB11 of Register 4 and by setting DB18 to 0 (CP
reference source).
In this mode, no external RSET is required. If DB18 is set to 1, the four nominal charge
pump currents (INOMINAL) can be externally tweaked according to the following
equation:
Ω
⎟⎟
⎜⎜
×
=
8
.
37
4
.
217
NOMINAL
CP
SET
I
I
R
where ICP is the base charge pump current in microamps. For further details on the
charge pump current, see the Register 4—PLL Charge Pump, PFD, and Reference Path
Control section.
6
REFIN
Reference Input. The nominal input level is 1 V p-p. Input range is 12 MHz to 160 MHz.
This pin has high input impedance and should be ac-coupled. If REFIN is being driven
by laboratory test equipment, the pin should be externally terminated with a 50 Ω
resistor (place the ac-coupling capacitor between the pin and the resistor). When
driven from an 50 Ω RF signal generator, the recommended input level is 4 dBm.
8
MUXOUT
Multiplexer Output. This output allows a digital lock detect signal, a voltage
proportional to absolute temperature (VPTAT), or a buffered, frequency-scaled
reference signal to be accessed externally. The output is selected by programming
DB21 to DB23 in Register 4.
9
DECL2
Decoupling Node for 2.5 V LDO. Connect 100 pF, 0.1 μF, and 10 μF capacitors between this
pin and ground.
12
DATA
Serial Data Input. The serial data input is loaded MSB first with the three LSBs being
the control bits.


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