TPS24720

SLVSAL1B

– MARCH 2011 – REVISED MAY 2011

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This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with

appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more

susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

DEVICE INFORMATION

PACKAGE

FUNCTION

MARKING

–40ºC to 85ºC

QFN-16

TPS24720

Latched or retry

24720

(1)

For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI

Web site at www.ti.com.

ABSOLUTE MAXIMUM RATINGS

over operating free-air temperature range, all voltages referred to GND (unless otherwise noted)

VALUE

UNIT

–0.3 to 30

ENSD, OV

–0.3 to 20

Input voltage range

–0.3 to 0.3

V

[SET, SENSE] to VCC

–0.3 to 0.3

IMON, LATCH, TIMER

–0.3 to 5

Sink current

FFLTb, FLTb, PGb

5

mA

PROG

Internally limited

Source current

IMON

5

mA

All pins except PGb

2

Human-body model

ESD rating

PGb

0.5

kV

Charged-device model

0.5

Temperature

Internally limited

°C

(1)

Do not apply voltage directly to these pins.

THERMAL INFORMATION

TPS24720

UNIT

QFN (16) PINS

Junction-to-ambient thermal resistance

47.3

°C/W

Junction-to-case (top) thermal resistance

63.8

°C/W

Junction-to-board thermal resistance

20.9

°C/W

Junction-to-top characterization parameter

1.6

°C/W

Junction-to-board characterization parameter

21

°C/W

Junction-to-case (bottom) thermal resistance

5.1

°C/W

(1)

For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

2

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Copyright

© 2011, Texas Instruments Incorporated

Product Folder Link(s): TPS24720