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L6728AH Datasheet(PDF) 5 Page - STMicroelectronics |
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L6728AH Datasheet(HTML) 5 Page - STMicroelectronics |
5 / 33 page L6728AH Pins description and connection diagrams Doc ID 15726 Rev 1 5/33 2 Pins description and connection diagrams Figure 3. Pins connection (top view) 2.1 Pin descriptions 1 2 3 4 VCC COMP / DIS FB PGOOD GND PHASE BOOT 9 6 7 8 L6728A UGATE LGATE / OC VSEN 5 10 L6728AH Table 2. Pin description Pin # Name Function 1BOOT HS driver supply. Connect through a capacitor (100 nF) to the floating node (LS-Drain) pin and provide necessary bootstrap diode from VCC. 2 PHASE HS driver return path, current-reading and adaptive-dead-time monitor. Connect to the LS drain to sense RDS(on) drop to measure the output current. This pin is also used by the adaptive-dead-time control circuitry to monitor when HS MOSFET is OFF. 3 UGATE HS driver output. Connect directly to HS MOSFET gate. 4 LGATE / OC LGATE. LS driver output. Connect directly to LS MOSFET gate. OC over-current threshold set. During a short period of time following VCC rising over UVLO threshold, a 10 μA current is sourced from this pin. Connect to GND with an R OCSET resistor greater than 5 k Ω to program OC Threshold. The resulting voltage at this pin is sampled and held internally as the OC set point. Maximum programmable OC threshold is 0.55 V. A voltage greater than 0.6 V activates an internal clamp and causes OC threshold to be set at the maximum value. 5GND All internal references, logic and drivers are connected to this pin. Connect to the PCB ground plane. 6VCC Device and drivers power supply. Operative range from 5 V to 12 V. Filter with at least 1 μF MLCC to GND. 7 COMP / DIS COMP. Error amplifier output. Connect with an RF - CF // CP to FB to compensate the device control loop. DIS. The device can be disabled by pushing this pin lower than 0.75 V (typ). Setting free the pin, the device enables again. 8FB Error amplifier inverting input. Connect with a resistor RFB to the output regulated voltage. Output resistor divider may be used to regulate voltages higher than the reference. 9 VSEN Regulated voltage sense pin for OVP and UVP protections and PGOOD. Connect to the output regulated voltage, or to the output resistor divider if the regulated voltage is higher than the reference. 10 PGOOD Open drain output set free after SS has finished and pulled low when VSEN is outside the relative window. Pull up to a voltage equal or lower than VCC. If not used it can be left floating. |
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