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ISL23511UFRU10Z Datasheet(PDF) 2 Page - Intersil Corporation |
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ISL23511UFRU10Z Datasheet(HTML) 2 Page - Intersil Corporation |
2 / 10 page 2 FN6588.1 January 21, 2008 Block Diagrams Pinouts ISL23511 (8 LD SOIC) TOP VIEW ISL23511 (10 LD µTQFN) TOP VIEW VCC NC PU PD RH VSS 1 2 3 4 8 7 6 5 RL RW O 9 8 7 6 1 2 3 4 NC VSS NC RL VCC PU RH PD O RW NC Pin Descriptions SOIC PIN µTQFN PIN SYMBOL BRIEF DESCRIPTION 11 PU The PU is a negative-edge triggered input with internal pull-up. Toggling PU will move the wiper close to RH terminal. 22 PD The PD is a negative-edge triggered input with internal pull-up. Toggling PD will move the wiper close to RL terminal. 33 RH The RH and RL pins of the ISL23511 are equivalent to the fixed terminals of a mechanical potentiometer. The minimum voltage is VSS and the maximum is VCC. The terminology of RH and RL references the relative position of the terminal in relation to wiper movement direction selected by the PU/PD input. 44 VSS Ground 56 RW The RW pin is the wiper terminal of the potentiometer, which is equivalent to the movable terminal of a mechanical potentiometer. 67 RL The RH and RL pins of the ISL23511 are equivalent to the fixed terminals of a mechanical potentiometer. The minimum voltage is VSS and the maximum is VCC. The terminology of RH and RL references the relative position of the terminal in relation to wiper movement direction selected by the PU/PD input. 7 5, 8, 10 NC No connection 89 VCC Supply Voltage 5-BIT UP/DOWN COUNTER ONE OF DECODER RESISTOR ARRAY RH PU PD TRANSFER GATES THIRTY RL VCC (SUPPLY VOLTAGE) GENERAL DETAILED 0 1 2 28 29 30 31 TWO RW CONTROL BLOCK PU PD VSS (GROUND) RH RL RW ISL23511 |
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