Technical Note

10/39

BD26502GUL

www.rohm.com

2010.02 - Rev.A

© 2010 ROHM Co., Ltd. All rights reserved.

●

Serial Interface

1. SPI format

・

When IFMODE is set to “H”, it can interface with SPI format.

・

The serial interface is four terminals (serial clock terminal (SCL), serial data input terminal (SDA), and chip

selection input terminal (CE)).

(1)Write operation

・

Data is taken into an internal shift register with rising edge of CLK. (Max of the frequency is 13MHz.)

・

The receive data becomes enable in the “H” section of CE. (Active “H”.)

・

The transmit data is forwarded (with MSB-First) in the order of write command “0”(1bit), the control register address

(7bit) and data (8bit).

CE

SCL

SDA

W

A6

A5

A4

A3

A2

A1

A0

D4

D3

D2

D1

D0

D7

D6

D5

Fig.4 Writing format

(2)Timing diagram

twlc

CE

SCL

SDA

tcsw

twhc

tcss

tscyc

tss

tsh

tcgh

Fig.5 Timing diagram (SPI format)

(3) Electrical Characteristics (Unless otherwise specified, Ta=25°C, VBAT=3.6V, VINSW=3.6V, VIO=1.8V)

Parameter

Symbol

Limit

Unit

Condition

Min

Typ

Max

SCL cycle time

tscyc

76

-

-

ns

H period of SCL cycle

Twhc

35

-

-

ns

L period of SCL cycle

twlc

35

-

-

ns

SDA setup time

tss

38

-

-

ns

SDA hold time

tsh

38

-

-

ns

Read and Write interval

tcsw

38

-

-

ns

CE setup time

tcss

55

-

-

ns

CE hold time

tcgh

55

-

-

ns