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FM25W256 Datasheet(PDF) 9 Page - Ramtron International Corporation

No. de pieza FM25W256
Descripción Electrónicos  256Kb Wide Voltage SPI F-RAM
Download  13 Pages
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Fabricante Electrónico  RAMTRON [Ramtron International Corporation]
Página de inicio  http://www.ramtron.com
Logo RAMTRON - Ramtron International Corporation

FM25W256 Datasheet(HTML) 9 Page - Ramtron International Corporation

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FM25W256 - 256Kb SPI F-RAM
Rev. 1.3
Feb. 2011
Page 9 of 13
Electrical Specifications
Absolute Maximum Ratings
Symbol
Description
Ratings
VDD
Power Supply Voltage with respect to VSS
-1.0V to +7.0V
VIN
Voltage on any pin with respect to VSS
-1.0V to +7.0V
and VIN < VDD+1.0V
TSTG
Storage Temperature
-55
°C to + 125°C
TLEAD
Lead Temperature (Soldering, 10 seconds)
260
° C
VESD
Electrostatic Discharge Voltage
- Human Body Model (AEC-Q100-002 Rev. E)
- Charged Device Model (AEC-Q100-011 Rev. B)
- Machine Model (AEC-Q100-003 Rev. E)
4kV
1.25kV
250V
Package Moisture Sensitivity Level
MSL-1
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating
only, and the functional operation of the device at these or any other conditions above those listed in the operational section of this
specification is not implied. Exposure to absolute maximum ratings conditions for extended periods may affect device reliability.
DC Operating Conditions (TA = -40
°C to + 85°C, VDD = 2.7V to 5.5V unless otherwise specified)
Symbol
Parameter
Min
Typ
Max
Units
Notes
VDD
Power Supply Voltage
2.7
3.3
5.5
V
IDD
Power Supply Current
@ SCK = 1.0 MHz
@ SCK = 20.0 MHz
-
-
0.25
2.0
mA
mA
1
ISB
Standby Current
15
30
µA
2
ILI
Input Leakage Current
-
±1
µA
3
ILO
Output Leakage Current
-
±1
µA
3
VIH
Input High Voltage
0.7 VDD
VDD + 0.5
V
VIL
Input Low Voltage
-0.3
0.3 VDD
V
VOH
Output High Voltage
@ IOH = -2 mA
VDD – 0.8
-
V
VOL
Output Low Voltage
@ IOL = 2 mA
-
0.4
V
Notes
1. SCK toggling between VDD-0.3V and VSS, other inputs VSS or VDD-0.3V.
2. SCK = SI = /CS=VDD. All inputs VSS or VDD.
3. VSS ≤ VIN ≤ VDD and VSS ≤ VOUT ≤ VDD.


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