AD9608 datasheet(7/40 Pages) AD

No. de pieza	AD9608

Descripción Electrónicos	10-Bit, 125/105 MSPS, 1.8 V Dual Analog-to-Digital Converter (ADC)

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Fabricante Electrónico	AD [Analog Devices]

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AD9608

Rev. 0 | Page 7 of 40

Parameter

Temp

Min

Typ

Max

Unit

LVDS Mode—DRVDD = 1.8 V

Differential Output Voltage (VOD), ANSI Mode

Full

290

345

400

mV

Output Offset Voltage (VOS), ANSI Mode

Full

1.15

1.25

1.35

V

Differential Output Voltage (VOD), Reduced Swing Mode

Full

160

200

230

mV

Output Offset Voltage (VOS), Reduced Swing Mode

Full

1.15

1.25

1.35

V

1 Pull up.

2 Pull down.

SWITCHING SPECIFICATIONS

AVDD = 1.8 V, DRVDD = 1.8 V, maximum sample rate, VIN = −1.0 dBFS differential input, 1.0 V internal reference, and DCS enabled, unless

otherwise noted.

Table 4.

AD9608-105

AD9608-125

Parameter

Temp

Min

Typ

Max

Min

Typ

Max

Unit

CLOCK INPUT PARAMETERS

Input Clock Rate

Full

1000

MHz

Conversion Rate1

DCS Enabled

Full

20

105

20

125

MSPS

DCS Disabled

Full

10

105

10

125

MSPS

CLK Period—Divide-by-1 Mode (tCLK)

Full

9.52

8

ns

CLK Pulse Width High (tCH)

Full

4.76

4

ns

Aperture Delay (tA)

Full

1.0

ns

Aperture Uncertainty (Jitter, tJ)

Full

0.07

ps rms

DATA OUTPUT PARAMETERS

CMOS Mode

CMOS Mode (DRVDD = 1.8 V)

Data Propagation Delay (tPD)

Full

1.8

2.9

4.4

1.8

2.9

4.4

ns

DCO Propagation Delay (tDCO)2

Full

2.0

3.1

4.4

2.0

3.1

4.4

ns

DCO to Data Skew (tSKEW)

Full

−1.2

−0.1

+1.0

−1.2

−0.1

+1.0

ns

LVDS Mode (DRVDD = 1.8 V)

Data Propagation Delay (tPD)

Full

2.4

ns

DCO Propagation Delay (tDCO)2

Full

4.4

ns

DCO to Data Skew (tSKEW)

Full

−0.1

+0.2

+0.5

−0.1

+0.2

+0.5

ns

CMOS Mode Pipeline Delay (Latency)

Full

16

Cycles

LVDS Mode Pipeline Delay (Latency)

Channel A/Channel B

Full

16/16.5

Cycles

Wake-Up Time (Power-Down)3

Full

350

μs

Wake-Up Time (Standby)

Full

250

ns

Out-of-Range Recovery Time

Full

2

Cycles

1 Conversion rate is the clock rate after the divider.

2 Additional DCO delay can be added by writing to Bits[2:0] in SPI Register 0x17 (see Ta

).

ble 18

3 Wake-up time is defined as the time required to return to normal operation from power-down mode.

Número de pieza similar - AD9608

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Analog Devices	AD9608	1Mb / 41P	1.8 V Dual Analog-to-Digital Converter (ADC)
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