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SM802128UMGTR Datasheet(PDF) 3 Page - Micrel Semiconductor |
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SM802128UMGTR Datasheet(HTML) 3 Page - Micrel Semiconductor |
3 / 12 page Micrel, Inc. SM802128 January 2012 3 hbwhelp@micrel.com or (408) 955-1690 Pin Description (continued) Pin Number Pin Name Pin Type Pin Level Pin Function 3, 6, 40 VSSO2 PWR Power Supply Ground for the Outputs on Bank 2 11, 20, 27, 30, 34 TEST Factory Test Pins. Do not connect anything to these pins. 12, 13 VDD PWR Core Power Supply 21, 23 VSS (Exposed Pad) PWR Core Power Supply Ground. The exposed pad must be connected to the VSS ground plane. 17 REF_IN I, (SE) LVCMOS Reference Clock Input 18 XTAL_IN I, (SE) Crystal Crystal Reference Input, no load caps needed (See Figure 5). 19 XTAL_OUT O, (SE) Crystal Crystal Reference Output, no load caps needed (See Figure 5). 15 OE1 I, (SE) LVCMOS Output Enable, Q1-Q4 disables to tri-state, 0 = Disabled, 1 = Enabled, 45KΩ Pull-Up. 22 OE2 I, (SE) LVCMOS Output Enable, Q5-Q8 disables to tri-state, 0 = Disabled, 1 = Enabled, 45KΩ Pull-Up. 9 PLL_BYPASS I, (SE) LVCMOS PLL Bypass, Selects Output Source 0 = Normal PLL Operation 1 = Output from Input Reference Clock or Crystal 45KΩ Pull-Down 10 XTAL_SEL I, (SE) LVCMOS Selects PLL Input Reference Source 0 = REF_IN, 1 = XTAL, 45KΩ Pull-Up 14 FSEL I, (SE) LVCMOS Frequency Select, 1 = 156.25MHz, 0 = 312.5MHz, 45KΩ Pull-Up Truth Tables OE1/2 0 Tri-state 1 LVPECL FSEL Output Frequency (MHz) 0 312.5 1 156.25 PLL_BYPASS/CSB XTAL_SEL 0 − − PLL 1 − − XTAL/REF_IN − 0 REF_IN − − 1 XTAL − |
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