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SLA24C02-S-3 Datasheet(PDF) 10 Page - Siemens Semiconductor Group |
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SLA24C02-S-3 Datasheet(HTML) 10 Page - Siemens Semiconductor Group |
10 / 27 page SLx 24C01/02/P Semiconductor Group 10 1998-07-27 The timing conventions for read and write operations are described in figures 5 and 6. Figure 5 Timing of the Command Byte CSW Figure 6 Timing of the Command Byte CSR 12 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 1 0 1 0 XXX 0 A7 A6 A5 A4 A3 A2 A1 A0 ACK START from Master Acknowledge from EEPROM Acknowledge from EEPROM SCL SDA Command Byte (CSW) Data Transfer to EEPROM IED02255 12 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 1 0 1 0 XXX 1 ACK START from Master Acknowledge from Master Acknowledge from EEPROM SCL SDA Command Byte (CSR) Data Transfer from EEPROM IED02185 ACK |
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Descripción similar - SLA24C02-S-3 |
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