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TPS53014DGS Datasheet(PDF) 6 Page - Texas Instruments |
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TPS53014DGS Datasheet(HTML) 6 Page - Texas Instruments |
6 / 20 page VIN VIN EN VOUT EN VFB VREG5 SS VIN TPS53014 SW DRVL DRVH VBST PGND SGND PGND 1 2 3 4 5 6 7 8 9 10 UV OV UVLO TSD EN LOGIC SS LOGIC PROTECTION LOGIC OCL SW 6.4µA 10µA 1 SHOT CONTROL LOGIC VREG5 VREG5 XCON REF VREG5 UVLO REF -32% +20% + + + + + - - - - SS REF SGND PGND UV OV ADC TPS53014 SLVSBF1 – MAY 2012 www.ti.com FUNCTIONAL BLOCK DIAGRAM OVERVIEW The TPS53014 is single synchronous step-down (buck) controller. It operates using D-CAP2™ mode control. The fast transient response of D-CAP2™ control reduces the required amount of output capacitance to meet a specific level of performance. Proprietary internal circuitry allows the use of low ESR output capacitors including ceramic and special polymer types. DETAILED DESCRIPTION PWM OPERATION The main control loop of the TPS53014 is an adaptive on-time pulse width modulation (PWM) controller that supports a proprietary D-CAP2™ control mode. D-CAP2™ control combines constant on-time control with an internal compensation circuit for pseudo-fixed frequency and low external component count configuration with both low ESR and ceramic output capacitors. It is stable even with virtually no ripple at the output. At the beginning of each cycle, the high-side MOSFET is turned on. this MOSFET is turned off when the internal timer expires. This timer is set by the converter input voltage VIN, and the output voltage VO, to maintain a pseudo- fixed frequency over the input voltage range, hence it is called adaptive on-time control. The timer is reset and the high-side MOSFET is turned on again when the feedback voltage falls below the nominal output voltage. An internal ramp is added to the reference voltage to simulate output ripple, eliminating the need for ESR induced output ripple from D-CAP2™ mode control. 6 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Link(s) :TPS53014 |
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