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SL324N Datasheet(PDF) 3 Page - System Logic Semiconductor |
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SL324N Datasheet(HTML) 3 Page - System Logic Semiconductor |
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3 / 4 page  SL324 System Logic Semiconductor SLS DC ELECTRICAL CHARACTERISTICS(T A=0 to +70 °C) Guaranteed Limit Symbol Parameter Test Conditions Min Typ Max Unit VIO Maximum Input Offset Voltage VO=1.4V VCC=5.0-30V;RS=0 Ω VICM=0V to VCC-1.7V 9.0 mV ∆V IO/ ∆T Input Offset Voltage Drift R S=0 Ω, V CC=30V 7.0 µV/°C IIO Maximum Input Offset Current VCC=5.0V 150 nA ∆I IO/ ∆T Input Offset Current Drift RS=0 Ω, V CC=30V 10 pA/ °C IIB Maximum Input Bias Current VCC=5.0V -500 nA VICR Input Common Mode Voltage Range VCC=30V 0 28 V ICC Maximum Power Supply Current RL= ∞,V CC=30V,V0=0V RL= ∞,V CC=5V,V0=0V 3 1.2 mA AVOL Minimum Large Signal Open-Loop Voltage Gain VCC=15V, RL ≥2KΩ 15 V/mV VOH Minimum Output High- Level Voltage Swing VCC=30V,RL=2K Ω VCC=30V,RL=10K Ω 26 27 V VOL Maximum Output Low- Level Voltage Swing VCC=5V,RL=10K Ω 20 mV CMR Common Mode Rejection VCC=30V, RS=10K Ω 65* dB PSR Power Supply Rejection VCC=30V 65 dB CS Channel Separation f=1KHz to 20KHz,VCC=30V -120* dB ISC Maximum Output Short Circuit to GND VCC=5.0V 60* mA Isource Minimum Output Source Current VIN+=1V, VIN-=0V, VCC=15V, V0=0V 10 mA Isink Minimum Output Sink Current VIN+=0V, VIN-=1V, VCC=15V, V0=15V VIN+=0V, VIN-=1V, VCC=15V, V0=0.2V 5 12* mA µA VIDR Differential Input Voltage Range All VIN ≥GND or V-Supply (if used) VCC* V *=@25 °C |
Número de pieza similar - SL324N |
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Descripción similar - SL324N |
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