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SL4013BN Datasheet(PDF) 1 Page - System Logic Semiconductor |
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SL4013BN Datasheet(HTML) 1 Page - System Logic Semiconductor |
1 / 5 page SL4013B System Logic Semiconductor SLS Dual D Flip-Flop High-Voltage Silicon-Gate CMOS The SL4013B consists of two identical, independent data-type flip- flops. Each flip-flop has independent data, set, reset, and clock inputs and Q and Q outputs. These devices can be used for shift register applications, and, by connecting Q output to the data input, for counter and toggle applications. The logic level present at the D input is transferred to the Q output during the positive-going transition of the clock pulse. Setting or resetting is independent of the clock and is accomplished by a high level on the set or reset line, respectively. • Operating Voltage Range: 3.0 to 18 V • Maximum input current of 1 µA at 18 V over full package- temperature range; 100 nA at 18 V and 25 °C • Noise margin (over full package temperature range): 1.0 V min @ 5.0 V supply 2.0 V min @ 10.0 V supply 2.5 V min @ 15.0 V supply ORDERING INFORMATION SL4013BN Plastic SL4013BD SOIC TA = -55 ° to 125° C for all packages LOGIC DIAGRAM PIN 14 =VCC PIN 7 = GND PIN ASSIGNMENT FUNCTION TABLE Inputs Outputs Clock Data Reset Set Q Q L L L L H H L L H L X L L Q Q X X H L L H X X L H H L X X H H H H X = don’t care |
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