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ADF4360-6BCPZRL7 Datasheet(PDF) 5 Page - Analog Devices

No. de pieza ADF4360-6BCPZRL7
Descripción Electrónicos  Integrated Synthesizer and VCO
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Fabricante Electrónico  AD [Analog Devices]
Página de inicio  http://www.analog.com
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ADF4360-6BCPZRL7 Datasheet(HTML) 5 Page - Analog Devices

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ADF4360-6
Rev. A | Page 5 of 24
TIMING CHARACTERISTICS1
AVDD = DVDD = VVCO = 3.3 V ± 10%; AGND = DGND = 0 V; 1.8 V and 3 V logic levels used; TA = TMIN to TMAX, unless otherwise noted.
Table 2.
Parameter
Limit at TMIN to TMAX (B Version)
Unit
Test Conditions/Comments
t1
20
ns min
LE Setup Time
t2
10
ns min
DATA to CLOCK Setup Time
t3
10
ns min
DATA to CLOCK Hold Time
t4
25
ns min
CLOCK High Duration
t5
25
ns min
CLOCK Low Duration
t6
10
ns min
CLOCK to LE Setup Time
t7
20
ns min
LE Pulse Width
1 See the
section for the recommended power-up procedure for this device.
Power-Up
CLOCK
DATA
LE
LE
DB23 (MSB)
DB22
DB2
DB1
(CONTROL BIT C2)
DB0 (LSB)
(CONTROL BIT C1)
t1
t2
t3
t7
t6
t4
t5
Figure 2. Timing Diagram


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