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54AC16646 Datasheet(PDF) 8 Page - Texas Instruments

No. de pieza 54AC16646
Descripción Electrónicos  16-BIT BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
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Fabricante Electrónico  TI1 [Texas Instruments]
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54AC16646 Datasheet(HTML) 8 Page - Texas Instruments

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PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
54AC16646, 74AC16646
16BIT BUS TRANSCEIVERS AND REGISTERS
WITH 3STATE OUTPUTS
SCAS241A − MARCH 1990 − REVISED APRIL 1996
8
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
POST OFFICE BOX 1443
• HOUSTON, TEXAS 77251−1443
switching characteristics over recommended operating free-air temperature range,
VCC = 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 2)
PARAMETER
FROM
TO
TA = 25°C
54AC16646
74AC16646
UNIT
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
MIN
TYP
MAX
MIN
MAX
MIN
MAX
UNIT
fmax
65
65
65
MHz
tPLH
A or B
B or A
3.4
9.3
13.2
3.4
15.7
3.4
14.8
ns
tPHL
A or B
B or A
3.6
10
13.4
3.6
15.1
3.6
4.5
ns
tPZH
OE
A or B
3.8
10.5
3.8
17.6
3.8
16.4
ns
tPZL
OE
A or B
4.8
13.9
4.8
22.1
4.8
20.9
ns
tPHZ
OE
A or B
4.4
7.6
4.4
11
4.4
10.7
ns
tPLZ
OE
A or B
4
7
4
10.4
4
10.1
ns
tPLH
CLKBA or CLKAB
A or B
4.7
12.1
4.7
19.9
4.7
18.7
ns
tPHL
CLKBA or CLKAB
A or B
4.8
12.2
4.8
18.8
4.8
18
ns
tPLH
SAB or SBA†
A or B
4.7
12
4.7
19.9
4.7
18.5
ns
tPHL
SAB or SBA†
(with A or B high)
A or B
4.5
11.4
4.5
17.2
4.5
16.4
ns
tPLH
SBA or SAB†
A or B
4
10.5
4
17.3
4
16.3
ns
tPHL
SBA or SAB†
(with A or B low)
A or B
5.2
13.3
5.2
20.3
5.2
19.3
ns
tPZH
DIR
A or B
3.6
10.3
3.6
17.9
3.6
16.8
ns
tPZL
DIR
A or B
4.7
13.5
4.7
22.1
4.7
20.8
ns
tPHZ
DIR
A or B
4.6
7.8
4.6
11.6
4.6
11.2
ns
tPLZ
DIR
A or B
3.9
7
3.9
11
3.9
10.6
ns
† These parameters are measured with the internal output state of the storage register opposite that of the bus input.
switching characteristics over recommended operating free-air temperature range,
VCC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 2)
PARAMETER
FROM
TO
TA = 25°C
54AC16646
74AC16646
UNIT
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
MIN
TYP
MAX
MIN
MAX
MIN
MAX
UNIT
fmax
75
75
75
MHz
tPLH
A or B
B or A
2.9
5.5
8.5
2.9
10.1
2.9
9.5
ns
tPHL
A or B
B or A
2.9
5.7
8.9
2.9
10.1
2.9
9.7
ns
tPZH
OE
A or B
3.1
6.1
9.4
3.1
11.1
3.1
10.5
ns
tPZL
OE
A or B
4.1
7.3
11
4.1
12.9
4.1
12.2
ns
tPHZ
OE
A or B
4
6.1
8.4
4
9.1
4
8.9
ns
tPLZ
OE
A or B
3.8
5.7
8
3.8
8.9
3.8
8.6
ns
tPLH
CLKBA or CLKAB
A or B
3.9
7
10.8
3.9
12.8
3.9
12.1
ns
tPHL
CLKBA or CLKAB
A or B
3.9
7.1
10.8
3.9
12.5
3.9
11.9
ns
tPLH
SAB or SBA†
A or B
4
7.4
11.1
4
13.4
4
12.5
ns
tPHL
SAB or SBA†
(with A or B high)
A or B
3.6
6.7
10.2
3.6
11.8
3.6
11.2
ns
tPLH
SBA or SAB†
A or B
3.3
6.1
9.5
3.3
11.2
3.3
10.6
ns
tPHL
SBA or SAB†
(with A or B low)
A or B
4.3
8
11.7
4.3
13.9
4.3
13.1
ns
tPZH
DIR
A or B
3
5.9
9.6
3
11.6
3
10.9
ns
tPZL
DIR
A or B
3.6
7
11.1
3.6
12.9
3.6
12.2
ns
tPHZ
DIR
A or B
4
6.2
8.8
4
9.6
3
9.4
ns
tPLZ
DIR
A or B
3.7
5.7
8.2
3.7
9
3.7
8.8
ns
† These parameters are measured with the internal output state of the storage register opposite that of the bus input.


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