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54AC16823 Datasheet(PDF) 5 Page - Texas Instruments |
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54AC16823 Datasheet(HTML) 5 Page - Texas Instruments |
5 / 9 page 54AC16823, 74AC16823 18BIT BUS INTERFACE FLIPFLOPS WITH 3STATE OUTPUTS SCAS243A − APRIL 1991 − REVISED APRIL 1996 5 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 timing requirements over recommended operating free-air temperature range, VCC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1) TA = 25°C 54AC16823 74AC16823 UNIT MIN MAX MIN MAX MIN MAX UNIT fclock Clock frequency 0 115 0 115 0 115 MHz tw Pulse duration CLR low 3.3 3.3 3.3 ns tw Pulse duration CLK high or low 4.4 4.4 4.4 ns CLR inactive 0.6 0.6 0.6 tsu Setup time before CLK ↑ Data 5 5 5 ns tsu Setup time before CLK ↑ CLKEN low 4.2 4.2 4.2 ns th Hold time after CLK ↑ Data 1.3 1.3 1.3 ns th Hold time after CLK ↑ CLKEN high or low 1.4 1.4 1.4 ns switching characteristics over recommended operating free-air temperature range, VCC = 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 1) PARAMETER FROM TO TA = 25°C 54AC16823 74AC16823 UNIT PARAMETER FROM (INPUT) TO (OUTPUT) MIN TYP MAX MIN MAX MIN MAX UNIT fmax 60 60 60 MHz tPLH CLK Q 3.9 13.8 16.8 3.9 18.8 3.9 18.8 ns tPHL CLK Q 4.7 14.5 17.3 4.7 18.9 4.7 18.9 ns tPHL CLR Q 4 12.4 14.9 4 16.2 4 16.2 ns tPZH OE Q 3 11.1 14 3 15.4 3 15.4 ns tPZL OE Q 4.3 15 18.7 4.3 20.8 4.3 20.8 ns tPHZ OE Q 4.5 8.5 10.4 4.5 11.2 4.5 11.2 ns tPLZ OE Q 3.9 7.7 9.3 3.9 10.3 3.9 10.3 ns switching characteristics over recommended operating free-air temperature range, VCC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1) PARAMETER FROM TO TA = 25°C 54AC16823 74AC16823 UNIT PARAMETER FROM (INPUT) TO (OUTPUT) MIN TYP MAX MIN MAX MIN MAX UNIT fmax 115 115 115 MHz tPLH CLK Q 3.1 7.8 10.6 3.1 12 3.1 12 ns tPHL CLK Q 3.9 8.6 11.4 3.9 12.7 3.9 12.7 ns tPHL CLR Q 3.2 7.4 9.9 3.2 11 3.2 11 ns tPZH OE Q 2.2 6.1 8.6 2.2 9.7 2.2 9.7 ns tPZL OE Q 3 7.4 10.6 3 11.8 3 11.8 ns tPHZ OE Q 4.2 6.8 8.7 4.2 9.3 4.2 9.3 ns tPLZ OE Q 3.7 6.2 7.8 3.7 8.6 3.7 8.6 ns operating characteristics, VCC = 5 V, TA = 25°C PARAMETER TEST CONDITIONS TYP UNIT Cpd Power dissipation capacitance per flip-flop Outputs enabled CL = 50 pF, f = 1 MHz 36 pF Cpd Power dissipation capacitance per flip-flop Outputs disabled CL = 50 pF, f = 1 MHz 18 pF PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice. |
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