The following specifications apply for V

Typ

Tested

Design

Parameter

Conditions

(Note 6)

Limit

Limit

Units

(Note 7)

(Note 8)

t

Falling Edge of RD to Output Valid)

Pin7=V

C

70

120

ns

C

90

150

ns

t

Rising Edge of RDY to Output

Valid)

R

30

ns

t

Pin 7=V

800

1300

ns

C

t

R

100

200

ns

(Delay from Rising Edge of RD to

Hi-Z State)

t

Pin7=V

WR to Falling Edge of INT

t

t

I

ns

t

t

t

ns

t

Figures 2, 3, 4

125

225

ns

RD to Rising Edge of INT

C

t

Figure 5,C

175

270

ns

WR to Rising Edge of INT

t

Figure 2,C

50

100

ns

t

Figure 5

20

50

ns

t

Pin 7=V

200

290

ns

Figure 3

t

Figures 2, 3, 4, 5

500

ns

to Next Conversion

(Note 4) See Graph

Slew Rate, Tracking

0.1

V/µs

C

45

pF

C

5

pF

C

5

pF

Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. DC and AC electrical specifications do not apply when operating

the device beyond its specified operating conditions.

Note 2: All voltages are measured with respect to the GND pin, unless otherwise specified.

Note 3: Total unadjusted error includes offset, full-scale, and linearity errors.

to 1 mA or less. The 4 mA package input current limits the number of pins that can exceed the power supply boundaries witha1mA current limit to four.

Note 6: Typicals are at 25˚C and represent most likely parametric norm.

Note 7: Tested limits are guaranteed to National’s AOQL (Average Outgoing Quality Level).

Note 8: Design limits are guaranteed but not 100% tested. These limits are not used to calculate outgoing quality levels.

Note 9: Human body model, 100 pF discharged through a 1.5 k

Ω resistor.

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