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DAC1208D650 Datasheet(PDF) 6 Page - Integrated Device Technology |
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DAC1208D650 Datasheet(HTML) 6 Page - Integrated Device Technology |
6 / 96 page DAC1208D650 4 © IDT 2012. All rights reserved. Product data sheet Rev. 04 — 2 July 2012 6 of 96 Integrated Device Technology DAC1208D650 2 , 4 or 8 interpolating DAC with JESD204A interface [1] P: power supply; G: ground; I: input; O: output. [2] H = heatsink (exposed die pad to be soldered to GND. A minimum of 81 thermal vias are required). 7. Limiting values 8. Thermal characteristics [1] Complies with JEDEC test board, in free air. VIN_N0 52 I serial interface lane 0 negative input VIN_P0 53 I serial interface lane 0 positive input VDDD(1V8) 54 P digital supply voltage 1.8 V VIN_P1 55 I serial interface lane 1 positive input VIN_N1 56 I serial interface lane 1 negative input VIN_N2 57 I serial interface lane 2 negative input VIN_P2 58 I serial interface lane 2 positive input VDDD(1V8) 59 P digital supply voltage 1.8 V VIN_P3 60 I serial interface lane 3 positive input VIN_N3 61 I serial interface lane 3 negative input n.c. 62 - not connected n.c. 63 - not connected JTAG 64 I JTAG test mode select (must be grounded) GND H[2] G ground Table 2. Pin description …continued Symbol Pin Type[1] Description Table 3. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit VDDA(3V3) analog supply voltage (3.3 V) 0.5 +4.6 V VDDA(1V8) analog supply voltage (1.8 V) 0.5 +2.5 V VDDD digital supply voltage 0.5 +2.5 V Tstg storage temperature 55 +150 C Tamb ambient temperature 40 +85 C Tj junction temperature 40 +125 C Table 4. Thermal characteristics Symbol Parameter Conditions Typ Unit Rth(j-a) thermal resistance from junction to ambient [1] 18.7 K/W Rth(j-c) thermal resistance from junction to case [1] 6.7 K/W |
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