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STD Datasheet(PDF) 2 Page - Texas Instruments |
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STD Datasheet(HTML) 2 Page - Texas Instruments |
2 / 9 page Introduction www.ti.com 1 Introduction The Texas Instruments TPS7A1601EVM-046 evaluation module helps design engineers to evaluate the operation and performance of the TPS7A16xx family of linear regulators for use in their own circuit applications. This particular EVM configuration contains a single linear regulator with internal thermal and current-limit shutdowns. The TPS7A1601 also has enable (disable), PG (Power Good), and user-programmable PG circuitry in an extremely small DGN (MSOP-8) PowerPAD ™ package. The regulator, including external components, is capable of delivering up to 100 mA to the load depending on the input/output power dissipation across the part. The TPS7A16xx does not require an input capacitor, and the output capacitor only needs to be ≥ 2.2 µF (effective minimum) for stability; however, for conservative design practice accounting for widely varying noise environments and dynamic line/load conditions, a 1- µF input capacitor and a 0.01-µF feedforward capacitor have been used in the design. 2 Setup This section describes the jumpers and connectors on the EVM as well as how to properly connect, set up, and use the TPS7A1601EVM. 2.1 Input/Output Connectors and Jumper Descriptions 2.1.1 J1 – VIN J1 is the input power supply voltage connector. Twist the positive input lead and ground return lead from the input power supply, and keep them as short as possible to minimize EMI transmission. Add additional bulk capacitance between J1 and J2 if the supply leads are greater than 6 inches. For example, an additional 47- µF electrolytic capacitor connected from J1 to ground can improve the transient response of the TPS7A1601, while eliminating unwanted ringing on the input due to long-wire connections. 2.1.2 J2 – GND J2 is the ground-return connector for the input power supply. 2.1.3 J3 – GND J3 is the output ground-return connector 2.1.4 J4 – VOUT J4 is the regulated output voltage connector. 2.1.5 JP1 – EN SP1 is the output enable. To enable the output, connect a jumper to short the ON pin 1 to the EN center pin 2. To disable the output, connect a jumper to short EN pin 2 to OFF pin 3. 2.1.6 J5 – PG J5 is Power Good. If a jumper is installed across J5, the PG signal is pulled up to Vout and the signal can be monitored via TP1 (test point 1). The user can also pull up the signals themselves by connecting directly to pin 1 of J5. The maximum pullup voltage that can be used on the PG pin is 5.5 V. 2.1.7 J6 – Input Diode Bypass The EVM is populated with a 100-V, 300-mA protection diode on the input. This diode can be bypassed by connecting a jumper across J6. 2.2 Equipment Setup • Turn off the input power supply after verifying that its output voltage is set to greater than 6 V (60 V maximum). Connect the positive voltage lead from input power supply to VIN at the J1 connector of the EVM. Connect the ground lead from the input power supply to GND at the J2 connector of the EVM. 2 TPS7A1601EVM-046 SLVU549 – December 2011 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated |
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