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CXA1166K Datasheet(PDF) 8 Page - Sony Corporation |
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CXA1166K Datasheet(HTML) 8 Page - Sony Corporation |
8 / 28 page – 8 – CXA1166K Electrical Characteristics Measurement Circuit Integral Linearity Error Measurement Circuit Differential Linearity Error Measurement Circuit DUT CXA1166K A<B A>B Comparator Buffer Controller DVM 8 8 “1 ” “0” 000•••00 to 111•••10 VIN + V – V S2 S1 S1:ON when A<B S2: ON when A>B A8 to A1 A0 B8 to B1 B0 Sampling Delay Measurement circuit Aperture Jitter Measurement circuit Aperture Jitter Measurement Method CXA1166K OSC1 φ:Variable OSC2 Logic Analizer 60MHz 60MHz Amp ECL Buffer CLK VIN 8 fr 1024 samples VIN σ (LSB) CLK VIN CLK t ∆ υ ∆ t 0V –1V –2V 129 128 127 126 125 Sampling timing fluctuation ( = aperture jitter) When the distribution of the output codes is σ (unit: LSB) If the maximum slew rate point is sampled with the clock signal having the same frequency as that of the analog input signal, Aperture jitter (Taj) is defined as follows: Taj = σ/ = σ/ ( ) ∆t ∆υ 2 256 × 2πf |
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