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SN74BCT2424A Datasheet(PDF) 2 Page - Texas Instruments |
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SN74BCT2424A Datasheet(HTML) 2 Page - Texas Instruments |
2 / 14 page SN74BCT2423A, SN74BCT2424A 16-BIT LATCHED MULTIPLEXER/DEMULTIPLEXER BUS TRANSCEIVERS SDIS013 – JULY 1989 – REVISED AUGUST 1990 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 28 29 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 30 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 31 32 33 34 SN74BCT2424A . . . FN PACKAGE (TOP VIEW) 876 5 4 93 168 67 2 35 36 37 38 39 66 65 27 64 63 62 61 40 41 42 43 AENL ABLEA ABENL GND AB 7 AB 6 AB 5 AB 4 GND AB 3 AB 2 AB 1 AB 0 VCC A / BSEL BLE BENL AENM ALE VCC VCC AB15 AB14 AB13 AB12 GND AB11 AB10 AB 9 AB 8 GND ABENM ABLEB BENM description The ’BCT2423A and ’BCT2424A are general-purpose 16-bit bidirectional transceivers with data storage latches and byte control circuitry arranged for use in applications where two separate data paths must be multiplexed onto, or demultiplexed from, a single data path. Typical applications include multiplexing and/or demultiplexing of address and data information in microprocessor- or bus-interface applications. These devices are also useful in memory-interleaving applications. The ’BCT2423A and ’BCT2424A offer inverted and noninverted data paths, respectively. The ’BCT2423A and ’BCT2424A were designed using Texas Instruments BiCMOS process, which features bipolar drive characteristics, but also greatly reduces the standby power of the device when disabled. This is valuable when the device is not performing an address or data transfer. Three 16-bit I/O ports, A15 –A0, B15 –B0, and AB15 –AB0 are available for address and/or data transfer. The AENM, AENL, BENM, BENL, ABENM, and ABENL inputs control the bus transceiver functions. These control signals also allow byte-control of the most significant byte and least significant byte for each bus. Address and/or data information can be stored using the internal storage latches. The ALE, BLE, ABLEA, and ABLEB inputs are active low, and are used to control data storage. When the latch enable input is low, the latch is transparent. When the latch enable input goes high, the data present at the inputs is latched, and remains latched until the latch enable input is returned low. Data on the ’A’ bus and ’B’ bus are multiplexed onto the ’AB’ bus via the A /BSEL control line. When A /BSEL is low, A15 –A0 is mapped to the AB15 –AB0 outputs. When A /BSEL is high, B15 –B0 is mapped to the AB15 –AB0 outputs. The SN74BCT2423A and SN74BCT2424A are characterized for operation from 0 °C to 70°C. |
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