1

2

3

4

5

6

7

8

9

10

11

12

24

23

22

21

20

19

18

17

16

15

14

13

B8

B7

B6

B5

B4

B3

B2

B1

OEAB

CLKAB

CLKENAB

GND

A8

A7

A6

A5

A4

A3

A2

A1

OEBA

CLKBA

CLKENBA

DW OR NT PACKAGE

(TOP VIEW)

SN74BCT2953

OCTAL BUS TRANSCEIVER AND REGISTER

WITH 3STATE OUTPUTS

SCBS105B − DECEMBER 1990 − REVISED NOVEMBER 1993

Copyright

2−1

POST OFFICE BOX 655303

POST OFFICE BOX 1443

Per MIL-STD-883C, Method 3015

Data Flowing in Both Directions

Small-Outline (DW) Packages and Standard

Plastic 300-mil DIPs (NT)

description

The SN74BCT2953 octal bus transceiver contains two 8-bit back-to-back registers that store data flowing in

both directions between two bidirectional buses. Data on the A or B bus is stored in the registers on the

low-to-high transition of the clock (CLKAB or CLKBA) input provided that the clock-enable (CLKENAB or

CLKENBA) input is low. Taking the output-enable (OEAB or OEBA) input low allows access of the data on the

output port (B port or A port).

The SN74BCT2953 is characterized for operation from 0

°C to 70°C.

FUNCTION TABLE†

INPUTS

OUTPUT

CLKENAB

CLKAB

OEAB

A

OUTPUT

B

H

X

L

X

B0‡

X

H or L

L

X

B0‡

L

↑

LL

H

L

↑

LH

L

X

X

H

X

Z

† A-to-B data flow is shown; B-to-A data flow is similar but

uses CLKENBA, CLKBA, and OEBA.

‡ Level of B before the indicated steady-state input

conditions were established.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

§ This symbol is in accordance with ANSI/IEEE Std 91-1984 and

IEC Publication 617-12.

31

B1

8

5D

A1

16

A2

17

A3

18

A4

19

EN3

15

1 C5

B2

7

B3

6

B4

5

A5

20

A6

21

A7

22

A8

23

B5

4

B6

3

B7

2

B8

1

G2

11

G1

13

EN4

9

2 C6

4

1

6D

OEBA

CLKENBA

OEAB

CLKENAB

14

CLKBA

10

CLKAB