SN54F51, SN74F51

DUAL 2WIDE 2INPUT, 2WIDE 3INPUT ANDORINVERT GATES

SDFS092 − JANUARY 1989 − REVISED OCTOBER 1993

Copyright

2−1

POST OFFICE BOX 655303

POST OFFICE BOX 1443

Small-Outline Packages, Ceramic Chip

Carriers, and Standard Plastic and Ceramic

300-mil DIPs

description

These devices contain 2-wide 2-input and 2-wide

3-input AND-OR-INVERT gates. They perform

the following Boolean functions:

1Y = (1A

• 1B • 1C) + (1D • 1E • 1F)

2Y = (2A

• 2B) + (2C • 2D)

The SN54F51 is characterized for operation over

the full military temperature range of − 55

°C to

125

°C. The SN74F51 is characterized for

operation from 0

°C to 70°C.

FUNCTION TABLES

GATE 1

INPUTS

OUTPUT

1A

1B

1C

1D

1E

1F

OUTPUT

1Y

H

H

H

X

X

X

L

X

XX

H

H

H

L

All other combinations

H

GATE 2

INPUTS

OUTPUT

2A

2B

2C

2D

OUTPUT

2Y

H

H

X

X

L

X

XH

H

L

All other combinations

H

SN54F51 ...J PACKAGE

SN74F51 ...D OR N PACKAGE

(TOP VIEW)

1

2

3

4

5

6

7

14

13

12

11

10

9

8

1A

2A

2B

2C

2D

2Y

GND

1C

1B

1F

1E

1D

1Y

SN54F51 . . . FK PACKAGE

(TOP VIEW)

32

1 20 19

910 11 12 13

4

5

6

7

8

18

17

16

15

14

1B

NC

1F

NC

1E

2B

NC

2C

NC

2D

NC − No internal connection

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.