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CXB1454R Datasheet(PDF) 7 Page - Sony Corporation |
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CXB1454R Datasheet(HTML) 7 Page - Sony Corporation |
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7 / 17 page  – 7 – CXB1454R Timing Chart Tofc Setup/hold time is refered from rising edge in CLKPOL = GND falling edge in CLKPOL = Vcc or OPEN Torc Vth 1/Fsftclk 2.0V 0.8V SFTCLK REDxx GRNxx BLUxx H/Vsync CNTL DE Thold Tsetup 2.0V 0.8V Tofd Tord Dsftclk/Fsftclk Fig. 6. Refclk request timing SDATAP SDATAN Pixel Sync/Cntl/DE TAclk error TDclk REFRQP REFRQN SftClk Indeterminate Indeterminate VCCA/G/T VEEA/G/T VCC CXB1454R Cprobe oscillo- scope CL' CL' + Cprobe = 10pF TTLout Fig. 4. Pixel/Sync/Cntl/DE waveform measurement Fig. 5. TTL output timing |
Número de pieza similar - CXB1454R |
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Descripción similar - CXB1454R |
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