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CXD1199AQ Datasheet(PDF) 3 Page - Sony Corporation |
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CXD1199AQ Datasheet(HTML) 3 Page - Sony Corporation |
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3 / 42 page  —3— CXD1199AQ Pin Description Pin No. Symbol I/O Description 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 D0 D1 VDD GND D2 D3 D4 D5 D6 D7 XCS XRD XWR XINT GND A0 A1 A2 A3 A4 TD0 XHRS XHCS HA0 HA1 HINT XHRD VDD GND XHWR HD0 HD1 HD2 HD3 HD4 I/O I/O — — I/O I/O I/O I/O I/O I/O I I I O — I I I I I I/O O I I I O I — — I I/O I/O I/O I/O I/O Sub CPU data bus Sub CPU data bus Power supply (+5 V) GND Sub CPU data bus Sub CPU data bus Sub CPU data bus Sub CPU data bus Sub CPU data bus Sub CPU data bus IC select negative logic signal from sub CPU Sub CPU strobe negative logic signal to read this IC internal register Sub CPU strobe negative logic signal to write this IC internal register Interrupt request negative logic signal from IC to sub CPU GND Sub CPU address Sub CPU address Sub CPU address Sub CPU address Sub CPU address Test I/O Negative logic signal indicating that IC has been reset from host; open drain output IC select negative logic signal from host Host address signal Host address signal Interrupt request negative logic signal to host; open drain output Host strobe negative logic signal to read this IC internal register Power supply (+5 V) GND Host strobe negative logic signal to read this IC internal register Host data bus Host data bus Host data bus Host data bus Host data bus |
Número de pieza similar - CXD1199AQ |
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Descripción similar - CXD1199AQ |
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