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LC72722PM Datasheet(PDF) 8 Page - Sanyo Semicon Device

No. de pieza LC72722PM
Descripción Electrónicos  Single-Chip RDS Signal-Processing System IC
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Fabricante Electrónico  SANYO [Sanyo Semicon Device]
Página de inicio  https://www.sanyo-av.com/us/
Logo SANYO - Sanyo Semicon Device

LC72722PM Datasheet(HTML) 8 Page - Sanyo Semicon Device

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LC72722PM
No. 6123-8/18
(3) Consecutive RAM read out possible flag (1bit) : RE
RE
RAM data information
1
The next data to be read out is in RAM
0
This data item is the last item in RAM, ant the next data is not present.
(4) RAM data remaining flag (2bits) : RF0,RF1
RF1
RF0
Remaining data in RAM (number of blocks)
0
0
1 to 7
0
1
8 to 15
1
0
16 to 23
1
1
24
Caution : This value is only meaningful when RE is 1. When RE is 0, there is no data in RAM, even if RF is 00.
If a synchronization reset was applied using SYR, then the backward protection block data that was written to memory
is also counted in this value.
(5) ARI(SK) detection flag (1bit) : ARI
ARI
SK signal
1
Detected
0
Not detected
(6) Synchronization established flag (1bit) : SYC
SYC
Synchronization detection
1
Synchronized
0
Not synchronized
Caution : This flag indicates the synchronization state of the circuit at the point when the data block being output was received.
On the other hand, the SYNC pin (pin18) output indicates the current synchronization state of the circuit.
(7) Error information flags (3bits) : E0 to E2
E
2
E
1
E
0
Number of bits corrected
0
0
0
0 (no errors)
0
0
1
1
0
1
0
2
0
1
1
3
1
0
0
4
1
0
1
5
1
1
0
Correction not possible
1
1
1
Unused
Caution : If the number of errors exceeds the value of the EC0 to EC2 setting (see the section on the CCB input format),
the error information flags will be set to the “Correction not possible” value.
(8) RDS data (16bits) : D0 to D15
This data is output with the MSB first ant the LSB last.
Caution : When error correction was not possible, the input data is output without change.


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